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pro vyhledávání: '"C.L. Henderson"'
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Akademický článek
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Akademický článek
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Publikováno v:
EDFA Technical Articles. 1:13-22
Sandia National Laboratories manufactures 0.5 µm CMOS ICs using local oxidation of silicon (LOCOS) and shallow trench isolation (STI) technologies. A program based on burn-in and life tests is being used to qualify the process for military and space
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fdfe430d2f55ffa86dbcbd7a7b3ebfcc
https://doi.org/10.31399/asm.edfa.1999-2.p013
https://doi.org/10.31399/asm.edfa.1999-2.p013
Publikováno v:
IEEE Design & Test of Computers. 14:59-69
Advancing IC and packaging technologies motivate and direct the future of failure analysis. The authors review current tools and techniques and discuss challenges and opportunities created by the industry's critical need for new diagnosis and failure
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::05bca5be7af8be41f343e7c45e8bb471
https://doi.org/10.1109/54.605998
https://doi.org/10.1109/54.605998
Autor:
C.L. Henderson
Lithographic processes play an important role in patterning materials for a wide variety of applications including integrated circuit (IC) fabrication, printed circuit board manufacturing, microfabrication of other devices such as microelectromechani
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f9c1a127e59cb22d1bd8c9b7de63f59
https://doi.org/10.1016/b978-0-444-53349-4.00201-6
https://doi.org/10.1016/b978-0-444-53349-4.00201-6
Autor:
Edward I. Cole, Reinhard Steiner, Paiboon Tangyunyong, Jerry M. Soden, Zbigniew R. Iwinski, C.L. Henderson, Rainer Danz, Daniel L. Barton
Publikováno v:
EDFA Technical Articles. 2:36-38
The device physics necessary to gain theoretical insight into the relationship between the bias conditions and the associated electric field for semiconductor structures in various failure conditions such as forward and reverse biased junctions, MOSF
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::76e8025cb16467b2eb4b81119f593501
https://doi.org/10.31399/asm.edfa.2000-4.p036
https://doi.org/10.31399/asm.edfa.2000-4.p036
Publikováno v:
FEMS Microbiology Letters. 72:127-130
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::90252e11827f2dadb923ef34bc58ad60
https://doi.org/10.1111/j.1574-6968.1990.tb03875.x
https://doi.org/10.1111/j.1574-6968.1990.tb03875.x
Publikováno v:
ITC
The economic impact of Type I test errors that fail good product in electronic systems and PC boards is evaluated. Data show that an average of 46 percent of all valid component failures at the board and system level are, in fact, not failures. Data
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f164c2c81b7c6745bd500cd89b713b7
https://doi.org/10.1109/test.1992.527855
https://doi.org/10.1109/test.1992.527855
Publikováno v:
ITC
The electrical and test properties of several logic gate open circuit defect structures were measured. Results indicate that tunneling current across fine geometry discontinuities enables low frequency operation of ICs. No significant capacitive coup
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd1020c309c87a79ab304eee4dc2545e
https://doi.org/10.1109/test.1991.519522
https://doi.org/10.1109/test.1991.519522