Zobrazeno 1 - 10
of 19
pro vyhledávání: '"C.H. Ellenwood"'
Autor:
T.J. Headley, Loren W. Linholm, Christine E. Murabito, E.H. Bogardus, Michael W. Cresswell, B.A. am Ende, William F. Guthrie, R.A. Allen, C.H. Ellenwood
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 16:239-248
A technique has been developed to determine the linewidths of the features of a prototype reference material for the calibration of critical-dimension (CD) metrology instruments. The reference features are fabricated in mono-crystalline-silicon with
Publikováno v:
IEEE Transactions on Instrumentation and Measurement. 45:136-141
Enhancements to the voltage-dividing potentiometer, an electrical test structure for measuring the spatial separations of pairs of conducting features, are presented and discussed. These enhancements reduce or eliminate systematic errors which can ot
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 7:266-271
A new electrical test structure for overlay measurement has been evaluated by replicating arrays of its complementary components from two different photomasks into a conducting film on a quartz substrate. The features resulting from images projected
Autor:
R.A. Allen, M.W. Cresswell, C.E. Murabito, W.F. Guthrie, L.W. Linholm, C.H. Ellenwood, E. Hal Bogardus
Publikováno v:
Proceedings of the 2002 International Conference on Microelectronic Test Structures, 2002. ICMTS 2002..
Publikováno v:
1999 IEEE International Integrated Reliability Workshop Final Report (Cat. No. 99TH8460).
The ultimate goal of this work is to develop design guidelines for electromigration test structures and to revise existing standard test methods for fast wafer-level and conventional package-level stress testing. These tests all involve stressing a s
Publikováno v:
ICMTS 92 Proceedings of the 1992 International Conference on Microelectronic Test Structures.
Improvements to the design of a modified voltage-dividing potentiometer permit the measurement of the center-to-center separations of parallel features with residual errors well below 10 nm. The modified test structure offers fabrication robustness a
Publikováno v:
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures.
A new test structure is reported. It is designed to measure the positions of the images of an array of features projected from a mask into a resist film on substrate with accuracy better than 10 nm. The resist film on the substrate covers a nominally
Autor:
R.A. Allen, J.C. Owen, C.H. Ellenwood, J.D. Benecke, Michael W. Cresswell, Loren W. Linholm, T.A. Hill, H.D. Stewart, S.R. Volk
Publikováno v:
Proceedings of 1994 IEEE International Conference on Microelectronic Test Structures.
The measurement of layer-to-layer feature overlay will, in the foreseeable future, continue to be a critical metrological requirement for the semiconductor industry. Meeting the image placement metrology demands of accuracy, precision, and measuremen
Publikováno v:
Proceedings of the 1991 International Conference on Microelectronic Test Structures.
A test chip has been designed and fabricated for the evaluation of surface-diffusion phenomena. It allows the confirmation of the correct sample cross-section bevel angle and orientation for scanning electron microscope (SEM) inspection of step cover
Publikováno v:
ICMTS 2000. Proceedings of the 2000 International Conference on Microelectronic Test Structures (Cat. No.00CH37095).
A technique has been developed to fabricate 100-nm critical dimension (CD) reference features with i-line lithography by utilizing a unique characteristic of single-crystal silicon-on-insulator films: under certain etch conditions, the edges of featu