Zobrazeno 1 - 10
of 108
pro vyhledávání: '"C. Torres-Huitzil"'
Publikováno v:
Latin American Applied Research - An international journal. 44:277-282
In cytogenetics, karyotype analysis is used to assess the presence of genetic defects by visualization chromosomes structure from microscopic images. A key step in this process is image thresholding, used to detect and extract objects of interest fro
Akademický článek
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Publikováno v:
2011 8th International Conference on Electrical Engineering, Computing Science and Automatic Control.
New platforms and mobile devices are constantly coming to the market but, in an effort to attract more public, several manufacturers incorporate special features into their models, resulting in a lack of uniformity among them. Thus, devices present d
Publikováno v:
RECONFIG
Reconfigurable Computing and FPGAs, International Conference on
Reconfigurable Computing and FPGAs, International Conference on, Dec 2008, Cancun, Mexico. pp.13-18, ⟨10.1109/ReConFig.2008.61⟩
ReConFig
Reconfigurable Computing and FPGAs, International Conference on
Reconfigurable Computing and FPGAs, International Conference on, Dec 2008, Cancun, Mexico. pp.13-18, ⟨10.1109/ReConFig.2008.61⟩
ReConFig
Recent findings have shown that several visual perceptual tasks such as 3D navigation and visual attention could use optical flow as a key step in their complex computing models and mechanisms for visual perception of motion and dynamic scene analysi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::24701dc345a93cd9c25ec1cefdad1564
https://hal.inria.fr/inria-00331663
https://hal.inria.fr/inria-00331663
Publikováno v:
2007 3rd Southern Conference on Programmable Logic.
Artificial neural networks (ANNs) are processing models widely explored due to their computational capabilities for solving problems. Recently, spiking neural networks (SNNs) are being studied as more biological plausible models that resemble closer
Publikováno v:
2003 IEEE International Workshop on Computer Architectures for Machine Perception.
Motion estimation of a scene is an interesting problem in computer vision since it is the basis for the dynamic analysis of a scene. However this task is computational intensive for conventional processors. In this work, a FPGA-based hardware archite
Autor:
C. Torres-Huitzil
Publikováno v:
FPL
In this paper the digital implementation of a pulse-mode neuron based on the voting circuit is presented. As a result of the revision and analysis on the literature, an enhanced area-saving silicon implementation of the voting circuit is presented. T
Autor:
B. Girau, C. Torres-Huitzil
Publikováno v:
IEEE 2005 Conference on Field-Programmable Technology-FPT'05
IEEE 2005 Conference on Field-Programmable Technology-FPT'05, Dec 2005, Singapore
FPT
IEEE 2005 Conference on Field-Programmable Technology-FPT'05, Dec 2005, Singapore
FPT
Based on neurophysiological studies of the visual cortex, the design and FPGA implementation of a bio-inspired hardware architecture for visual perception of motion is presented. The architecture is based on a neural model that mimics the way in whic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f957be1c0828a71818dbf64168b60896
https://hal.inria.fr/inria-00000568
https://hal.inria.fr/inria-00000568
Publikováno v:
International Joint Conference on Neural Networks-IJCNN 2005
International Joint Conference on Neural Networks-IJCNN 2005, Jul 2005, Montréal, Québec/Canada
International Joint Conference on Neural Networks-IJCNN 2005, Jul 2005, Montréal, Québec/Canada
Motion estimation is a fundamental step to understand the dynamics of a scene to allow intelligent systems interact with their environment. Motion computation is usually restricted by real time requirements that need the design and implementation of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::121401984ed98a11a6578ebaf41ad784
https://hal.inria.fr/inria-00000163
https://hal.inria.fr/inria-00000163
Publikováno v:
FPT
Recently, a growing community of researchers has used reconfigurable hardware systems to solve computationally intensive problems. Reconfigurability provides optimised processors for systems on chip designs, and makes easy to import technology to a n