Zobrazeno 1 - 10
of 25
pro vyhledávání: '"C. Rinn Cleavelin"'
Publikováno v:
Handbook of Semiconductor Manufacturing Technology ISBN: 9781315213934
Handbook of Semiconductor Manufacturing Technology, Second Edition
Handbook of Semiconductor Manufacturing Technology, Second Edition
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6073534e2352cda33c56a53ee8c079fc
https://doi.org/10.1201/9781420017663-9
https://doi.org/10.1201/9781420017663-9
Autor:
Wade Xiong, Sorin Cristoloveanu, Jung-Hee Lee, Young Ho Bae, C. Rinn Cleavelin, P. Patruno, Kyoung Il Na
Publikováno v:
ECS Transactions. 19:297-302
The multiple gate MOSFETs transistors such as double-, triple-, and quadruple-gate MOSFETs on siliconon-insulator (SOI) substrate become the key devices for advanced CMOS technology because of their high performance and tolerance of short-channel eff
Publikováno v:
IEEE Electron Device Letters. 29:916-919
Hot carrier injection (HCI) reliability and negative bias temperature instability (NBTI) of multiple-gate field-effect transistors (MuGFETs) with highly tensile metal gate electrodes were investigated. The results were compared with those from contro
Autor:
C. Rinn Cleavelin, Ian Cayrefourcq, Klaus Von Arnim, Klaus Schruefer, Mike Ma, C.H. Hsu, Thomas Schulz, Tiehui Liu, Carlos Mazure, Jean-Pierre Colinge, Mark Kennard, Karim Cherkaoui, Kyoungsub Shin, P. Patruno, Weize W. Xiong, Sun Xin
Publikováno v:
ECS Transactions. 6:59-69
MuGFET structure improves local transistor mismatch compared to planar bulk MOSFET. This enables further SRAM cell size reduction. GIDL current is well controlled even with a mid-gap metal gate. MuGFETs have low subthreshold leakage if Lg/Wsi ratio i
Publikováno v:
2010 International Electron Devices Meeting.
A detailed study of the impacts of fin aspect ratio and crystalline orientation and process-induced channel stress on the performance of multi-gate transistors is presented. It is found that CESL-induced stress provides for the greatest enhancement i
Autor:
K. von Armin, Christian Pacha, M. Kulkarni, T. Schulz, P. Patruno, Weize Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer
Publikováno v:
2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software.
Correlation of a full parasitic extracted simulation using StarRC and Spice to silicon is demonstrated for Fully Depleted (FD) FinFET silicon-on-insulator ring oscillators. The results indicate similar accuracy can be expected as obtained from bulk s
Autor:
Kyoungsub Shin, Thomas Schulz, Mark Kennard, Tiehui Liu, C. Rinn Cleavelin, Weize Xiong, Ian Cayrefourcq, P. Patruno, Klaus Schruefer, Carlos Mazure
Publikováno v:
2006 64th Device Research Conference.
Autor:
P. Patruno, T. Schulz, Chadwin D. Young, Klaus Schruefer, K. Matthew, C. Rinn Cleavelin, Weize Xiong
Publikováno v:
2006 IEEE International Conference on IC Design and Technology.
The hysteresis and mobilities of 1nm EOT HfSiON dielectric on Multi-Gate MOSFET (MuGFET) with TiN metal gate were studied. We did not observe any drain current hysteresis. This is consistent with the same gate stack on planar bulk MOSFET. However, we
Autor:
F. Siegelin, Harald Gossner, T. Schulz, Charvaka Duvvury, C. Rinn Cleavelin, Jens Schneider, C. Russ, Klaus Schruefer, Weize Xiong
Publikováno v:
2006 International Electron Devices Meeting.
FinFET devices have been recently reported to show an unprecedented sensitivity to ESD stress. Detailed failure analyses under ESD stress for these devices reveal a uniquely new mechanism that indicates fusing of single fins. This rather unexpected p
Autor:
Klaus Schruefer, Thomas Schulz, Weize Xiong, P. Patruno, Rick L. Wise, Rudy Quintanilla, Rownak J. Zaman, Sanjay K. Banerjee, C. Rinn Cleavelin, M. F. Pas
Publikováno v:
MRS Proceedings. 872
In this paper we present a comprehensive study of the impact of the Hydrogen (H2) annealing conditions on nano scale silicon fin structures. Hydrogen pressure was varied from 15Torr to 600Torr and anneal temperature was varied from 600°C to 900°C.