Zobrazeno 1 - 2
of 2
pro vyhledávání: '"C. J. Vath"'
Autor:
Pinjala Damaruganath, M Ravi, John H. Lau, Ebin Liao, Vempati Srinivasa Rao, Nagarajan Ranganathan, Hong Yu Li, Yen Yi Germaine Hoe, Jiangyan Sun, Xiaowu Zhang, Eva Wai, Tai Chong Chai, C. J. Vath, C. S. Selvanayagam, Y Tsutsumi, Yue Ying Ong, Shiguo Liu, Kripesh Vaidyanathan
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 1:660-672
The continuous push for smaller bump pitch interconnection in line with smaller Cu/low-k technology nodes demands the substrate technology to support finer interconnection. However, the conventional organic buildup substrate is facing a bottleneck in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::19099bdcb6f56725b6fe9bc40b06a81b
https://doi.org/10.1109/tcpmt.2010.2101911
https://doi.org/10.1109/tcpmt.2010.2101911
Autor:
John H. Lau, V. Kripesh, Yue Ying Ong, John Doricko, Jiangyan Sun, Nagarajan Ranganathan, Damaruganath Pinjala, Shiguo Liu, Xiaowu Zhang, Gongyue Tang, Tai Chong Chai, Eva Wai, C. J. Vath, Ebin Liao, Srinivasa Rao Vempati, C. S. Selvanayagam, Kalyan Biswas, Hongyu Li
Publikováno v:
2009 59th Electronic Components and Technology Conference.
Because of Moore's (scaling/integration) law, the Cu/low-k silicon chip is getting bigger, the pin-out is getting higher, and the pitch is getting finer. Thus, the conventional organic buildup substrates cannot support these kinds of silicon chips an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2fed625a5f62a19b756ff10a058a76df
https://doi.org/10.1109/ectc.2009.5074032
https://doi.org/10.1109/ectc.2009.5074032