0.13 μm HR SiGe BiCMOS Technology exhibiting 169 fs Ron x Coff Switch Performance targeting WiFi 6E Fully-Integrated RF Front-End-IC Solutions

Autor: F. Gianesello, C. Charbuillet, N. Derrier, D. Muller, C. Diouf, D. Ney, C. Deglise-Favre, I. Sicard, M. Ali Nsibi, R. Debroucke, M. Buczko, C.A. Legrand, Ph. Cathelin, F. Paillardet, J.C. Mas, P. Chevalier, D. Gloria

Publikováno v: 2022 International Electron Devices Meeting (IEDM).

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::6c71be8acdc0e55552eb95378d2c95f5
https://doi.org/10.1109/iedm45625.2022.10019469

Revisited RF Compact Model of Gate Resistance Suitable for High- $K$/Metal Gate Technology

Autor: Francois Danneville, Patrick Scheer, B. Dormieu, C. Charbuillet, H. Jaouen

Publikováno v: IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers, 2013, 60, pp.13-19. ⟨10.1109/TED.2012.2225146⟩
IEEE Transactions on Electron Devices, 2013, 60, pp.13-19. ⟨10.1109/TED.2012.2225146⟩

State-of-the-art compact models of gate access resistance are investigated and compared with RF measurements for 28-nm high-k/metal gate MOS transistors. This work shows that the usual lumped gate resistance model fails to capture both geometry scali

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3d09fcb4ba3753a2c6a0c21fec964812
https://doi.org/10.1109/ted.2012.2225146

On the Limitations of Silicon for I-MOS Integration

Autor: Stephane Monfray, Thomas Skotnicki, A. Savio, C. Charbuillet

Publikováno v: IEEE Transactions on Electron Devices. 56:1110-1117

This paper discusses the scalability of the supply voltage with the device length in silicon impact ionization MOS (I-MOS) transistors, by presenting results from both experiments and simulations. It is first shown that the supply voltage of silicon

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::dce6b3ebc959036af99bd0ecff9b4fb7
https://doi.org/10.1109/ted.2009.2015163

Refinement of the Subthreshold Slope Modeling for Advanced Bulk CMOS Devices

Autor: Tomasz Skotnicki, A. Pouydebasque, Romain Gwoziecki, C. Charbuillet

Publikováno v: IEEE Transactions on Electron Devices. 54:2723-2729

We present here a simple analytical model of the subthreshold slope of CMOS devices that successfully describes the long-channel plateau, the initial improvement for medium gate lengths, and the final degradation for short gate lengths. The model is

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::d08f77b2b8dbc150e9ad47fe58e2b91d
https://doi.org/10.1109/ted.2007.904483

4-port isolated MOS modeling and extraction for mmW applications

Autor: Patrick Scheer, B. Dormieu, C. Charbuillet, Francois Danneville, S. Jan

Publikováno v: Proceedings of 38th European Solid-State Circuits Conference, ESSCIRC 2012
38th European Solid-State Circuits Conference, ESSCIRC 2012
38th European Solid-State Circuits Conference, ESSCIRC 2012, 2012, Bordeaux, France. joint ESSDERC/ESSCIRC session B3L-A, paper ID 3149, 38-41, ⟨10.1109/ESSCIRC.2012.6341251⟩
ESSCIRC

This paper reports on the extraction of the small-signal equivalent circuit of 28nm isolated RF MOS transistors using on-wafer 4-port S-parameter measurements up to 50GHz. It shows that modeling accuracy of RF MOS is significantly enhanced via a 4-re

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b18555affb97134df8ab0f6505ab86a0
https://hal.archives-ouvertes.fr/hal-00801044