Zobrazeno 1 - 10
of 20
pro vyhledávání: '"C. Andre T. Salama"'
Autor:
Farsheed Mahmoudi, C. Andre T. Salama
Publikováno v:
Analog Integrated Circuits and Signal Processing. 48:185-197
The design and implementation of an 8 GHz CMOS quadrature downconverter, achieving simultaneously low voltage supply operation and good linearity is presented in this paper. This is achieved by relaxing the inherent tradeoff between power conversion
Autor:
R.A. Aroca, C. Andre T. Salama
Publikováno v:
Analog Integrated Circuits and Signal Processing. 48:167-174
This paper presents the design and implementation of a new wide dynamic range parallel feedback (PF) transimpedance amplifier (TIA) for 10 Gb/s optical links. The wide dynamic range is attributed to the novel TIA architecture employing both shunt-shu
Autor:
C. Andre T. Salama, Dusan Suvakovic
Publikováno v:
The Journal of VLSI Signal Processing. 33:83-103
This paper presents a strategy for minimizing non-adiabatic dissipation in adiabatic arithmetic units. The non-adiabatic dissipation is minimized by architectural design involving a small number of complex logic gates. Circuit design of complex adiab
Autor:
C. Andre T. Salama, Wei Yang
Publikováno v:
Analog Integrated Circuits and Signal Processing. 26:191-204
Low-voltage low-power sigma-delta modulators provide a critical interface in portable mixed-signal electronic systems. This paper deals with the design and implementation of a low-voltage, low-power 2nd-order sigma-delta modulator operating from a si
Autor:
John Z Ren, C. Andre T. Salama
Publikováno v:
Solid-State Electronics. 44:1931-1937
A partially depleted CMOS compatible SOI NMOSFET structure with suppressed floating body effects is proposed in this paper. The structure uses high dose Si implantation to reduce the carrier lifetime in the floating body region near the bottom channe
Autor:
C. Andre T. Salama, Mehrdad Ramezani
Publikováno v:
Analog Integrated Circuits and Signal Processing. 24:175-185
This paper discusses the design and implementation of a monolithic gate driver for an Insulated Gate Bipolar Transistor (IGBT). The objective is to implement a high voltage (25 V) monolithic gate driver with a novel protection circuit in a convention
Autor:
C. Andre T. Salama, Mehran Aliahmad
Publikováno v:
Analog Integrated Circuits and Signal Processing. 17:261-274
This paper presents a 30 V line driver for short loop subscriber line interface circuit applications. The high voltage line drivers was implemented in a low-voltage 0.8 μm BiCMOS process using 30 V extended-drain MOS transistors, fully compatible wi
Publikováno v:
Solid-State Electronics. 39:571-576
The design and implementation of a resurfed high-voltage NMOS device in a low-voltage 0.8 μm BiCMOS technology is reported in this paper. Because of its full compatibility with existing technology, the high-voltage NMOS device can be fabricated with
Autor:
Manish Mittal, C. Andre T. Salama
Publikováno v:
International Journal of High Speed Electronics and Systems. :1-12
Design of a 1.9 Gbits/s, 8×8 cross-point switch using nonself-aligned 1 µm D-MESFET GaAs technology is presented. An 8×1 switch bit-slice was fabricated and tested. Experimental results are provided to verify the functionality and performance of t
Autor:
C. Andre T. Salama, Shohreh Ghetmiri
Publikováno v:
2009 52nd IEEE International Midwest Symposium on Circuits and Systems.
This paper discusses the design and characterization of a track-and-hold amplifier (THA) and a comparator which are the essential building blocks of an 8bit, 12.5GS/s folding-interpolating analog to digital converter (ADC) with a 3GHz bandwidth. The