Zobrazeno 1 - 10
of 71
pro vyhledávání: '"C Lagahe"'
Autor:
P. R. A. Binetti, X. J. M. Leijtens, T. de Vries, Y. S. Oei, L. Di Cioccio, J.-M. Fedeli, C. Lagahe, J. Van Campenhout, D. Van Thourhout, P. J. van Veldhoven, R. Nötzel, M. K. Smit
Publikováno v:
IEEE Photonics Journal, Vol 2, Iss 3, Pp 299-305 (2010)
We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 $\mu
Externí odkaz:
https://doaj.org/article/b81d9a6450cb41389cbb9bef34e6a7aa
Publikováno v:
ECS Solid State Letters. 2:P47-P50
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bba401a112475a97f22e91ffcb230319
https://doi.org/10.1149/2.006306ssl
https://doi.org/10.1149/2.006306ssl
Autor:
B. Giffard, P. Coudrain, C. Lagahe-Blanchard, X. Gagnard, Perrine Batude, P. Magnan, Pascal Ancey, M. Vinet, Yvon Cazaux, A. Pouydebasque, C. Leyris, A. Castex
Publikováno v:
IEEE Transactions on Electron Devices. 56:2403-2413
A new 3-D CMOS image sensor architecture is presented as a potential candidate for submicrometer pixels. To overcome the scaling challenge related to miniaturized pixel design rules, far beyond traditional 3-D stacking alignment capabilities, a seque
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0f8765ab529e36ba30321fd1ea786b4c
https://doi.org/10.1109/ted.2009.2030990
https://doi.org/10.1109/ted.2009.2030990
Autor:
Fabrice Letertre, Benedite Osternaud, Nicolas Daval, Ian Cayrefourcq, C. Lagahe, B. Bataillou, C. Aulentte, C. Morales, N. Sousbie, S. Sartori, Carlos Mazure, Franck Fournel, Beatrice Biasse, E. Jalaguier, B. Aspar, J.F. Michaud, C. Richtarch, Bruno Ghyselen, A.M. Cartier, Takeshi Akatsu, S. Pocas, Olivier Rayssac, A. Beaumont, A. Soubie, Hubert Moriceau
Publikováno v:
Journal of Electronic Materials. 32:829-835
The SmartCut process was first developed to obtain silicon-on-insulator (SOI) materials. Now an industrial process, the main Unibond SOI-structure trends are reported in this paper. Many material combinations can be achieved by this process, because
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a4b45aa41353115a35fb42b8df91ba24
https://doi.org/10.1007/s11664-003-0196-x
https://doi.org/10.1007/s11664-003-0196-x
Autor:
A. Soubie, Christophe Maleville, E. Jalaguier, B. Aspar, Gérard Benassayag, Hubert Moriceau, Bruno Ghyselen, Beatrice Biasse, O. Rayssac, C. Lagahe, Jérémie Grisolia, Alain Claverie, A. M. Papon, T. Barge, Fabrice Letertre
Publikováno v:
Journal of Electronic Materials. 30:834-840
The Smart-Cut® process, based on ion implantation (hydrogen, helium) and wafer bonding, appears more and more as a generic process. The first part of the paper is dedicated to the specific case of thermally-induced splitting. Cavity growth by the Os
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a9c291acb7bfacbc86719910aed8755
https://doi.org/10.1007/s11664-001-0067-2
https://doi.org/10.1007/s11664-001-0067-2
Publikováno v:
IEEE 2011 International SOI Conference.
Though Silicon-on-Sapphire (SOS) has many applications for RF circuits, compressive strain in the hetero-epitaxially deposited silicon film reduces the electron mobility and diminishes its high-frequency performance. To eliminate this strain, we bond
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fcb3e2b3d4cc608abfa45f5177036a4
https://doi.org/10.1109/soi.2011.6081706
https://doi.org/10.1109/soi.2011.6081706
Publikováno v:
2011 IEEE International Conference on IC Design & Technology.
Smart Stacking™ is a wafer-to-wafer stacking technology of partially or fully processed wafers. This technology enables transferring very thin layers in a high volume manufacturing environment. The core technologies are surface conditioning, low te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b9630b4db37678ad35c07b7b5db3e440
https://doi.org/10.1109/icicdt.2011.5783202
https://doi.org/10.1109/icicdt.2011.5783202
Publikováno v:
Applied Physics Letters. 76:852-854
Proton implantation and thermal annealing of silicon result in the formation of a specific type of extended defects involving hydrogen, named “platelets” or “cavities.” These defects have been related to the exfoliation mechanism on which a n
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b839893a7879debbfc33673eb5b5033
https://doi.org/10.1063/1.125606
https://doi.org/10.1063/1.125606
Autor:
C. Lagahe-Blanchard, B. Aspar
Publikováno v:
2009 IEEE International SOI Conference.
Wafer stacking technologies are today available for different 3D integration schemes. These are compatible with back end of line CMOS processes and packaging. Smart Stacking technology and Copper to Copper direct bonding processes were described as k
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f33ca5a9a8047c3a2c12cb7edf3cab2
https://doi.org/10.1109/soi.2009.5318779
https://doi.org/10.1109/soi.2009.5318779
Autor:
E. Smalbrugge, Y.S. Oei, T. de Vries, P.R.A. Binetti, P.J. van Veldhoven, C Lagahe, D. Van Thourhout, A. Morant Ripoll, MK Meint Smit, Xaveer Leijtens, R Richard Nötzel, J-M. Fedeli, L. Di Cioccio, Regis Orobtchouk
Publikováno v:
2009 IEEE LEOS Annual Meeting Conference Proceedings.
We developed an InP-based photodetector which was bonded on a CMOS wafer containing a Si 3 N 4 -wiring photonic circuit. The detector fabrication is compatible with wafer scale processing steps, guaranteeing compatibility towards future generation el
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::18b3a668fa21eaa57c9f914abce3a9ba
https://doi.org/10.1109/leos.2009.5343085
https://doi.org/10.1109/leos.2009.5343085