Zobrazeno 1 - 2
of 2
pro vyhledávání: '"Bruce Miao"'
Autor:
Oleg Gluschenkov, Zuoguang Liu, Chengyu Niu, Andreas Knorr, Tenko Yamashita, Jay W. Strane, Mukesh Khare, Gen Tsutsui, Chris M. Prindle, Abraham Arceo, Indira Seshadri, Bruce Miao, A. Petrescu, Stan D. Tsai, Curtis Durfee, Soon-Cheon Seo, Adra Carr, Jie Yang, Walter Kleemeier, Kisik Choi, F. Lie, W. Wang, Rama Divakaruni, Chanro Park, Mark Raymond, Heng Wu, Huiming Bu, Dechao Guo, Anuja DeSilva, George Yang, Dinesh Gupta, Muthumanickam Sankarapandian, Praneet Adusumilli, Sam Choi, Kerem Akarvardar
Publikováno v:
2017 IEEE International Electron Devices Meeting (IEDM).
In this study, a manufacturable CMOS dual solid phase epitaxy (SPE) process with pc < 2.2×10−9 Q-cm2 on both NFET and PFET is demonstrated on the hardware with 7nm ground rule. Contact resistivity reduction strategies of both the conventional appr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fafc4c9a45bd4b7e938db8bc086dead4
https://doi.org/10.1109/iedm.2017.8268440
https://doi.org/10.1109/iedm.2017.8268440
Autor:
Thamarai S. Devarajan, Praneet Adusumilli, Derrick Liu, Hoon Kim, Vijay Narayanan, Christopher Prindle, Jeffrey C. Shearer, Terence B. Hook, Jie Yang, Miaomiao Wang, Mark Raymond, Andreas Knorr, Steven Bentley, Bruce Miao, Shogo Mochizuki, Oleg Gluschenkov, Kwan-Yong Lim, Philip J. Oldiges, Chengyu Niu, Bei Liu, Dinesh Gupta, Koji Watanabe, Gen Tsutsui, Mukesh Khare, Rama Divakaruni, Rohit Galatage, Huimei Zhou, Pietro Montanini, Gauri Karve, Jay W. Strane, Jody A. Fronheiser, Rajasekhar Venigalla, Chun Wing Yeung, Hiroaki Niimi, Dechao Guo, Fee Li Lie, Kisup Chung, Reinaldo A. Vega, James J. Kelly, Ruqiang Bao, Eric R. Miller, Huiming Bu, Zuoguang Liu, Robert R. Robison, Shariq Siddiqui, Sivananda K. Kanakasabapathy, Hemanth Jagannathan, Andrew M. Greene
Publikováno v:
2016 IEEE International Electron Devices Meeting (IEDM).
Low Ge content SiGe-based CMOS FinFET is one of the promising technologies [1-2] offering solutions for both high performance and low power applications. In this paper, we established a competitive SiGe-based CMOS FinFET baseline and examined various
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a314387759ff753d305942894281270a
https://doi.org/10.1109/iedm.2016.7838439
https://doi.org/10.1109/iedm.2016.7838439