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pro vyhledávání: '"Bruce L. Bateman"'
Publikováno v:
2017 IEEE International Memory Workshop (IMW).
Inter-cell disturb from minority carriers is found to be one of the major problems for scaling cross-point vertical Thyristor arrays. Cell designs with minority carrier lifetime killers and deep trench isolations are either ineffective or difficult t
Publikováno v:
A-SSCC
Design techniques are described for building cross-point resistive memory arrays without the use of a selection device for each resistive memory element. A memory cell selection technique is shown to allow the use of low voltage transistors and to so
Autor:
Sri Rama Namala, Bruce L. Bateman, Christophe J. Chevallier, Misako Matsuoka, Seow Fong Lim, Darrell Rinerson, Chang Hua Siau
Publikováno v:
ISSCC
A number of technologies have been proposed to replace NAND Flash as scaling becomes more difficult [1–2]. One promising area includes resistive memories using the conductive metal oxide (CMOx™) technology where multiple memory layers can be stac
Autor:
R. Roy, Chiming Show, Seong-Ook Jung, Farid Nemati, Bruce L. Bateman, Hyun-Jin Cho, Kenneth E. Young, R. Chopra
Publikováno v:
ISSCC
A thyristor-based memory cell technology provides SRAM-like performance at 2times to 3times the density of conventional 6T SRAM. The technology is readily embedded into conventional nano-scale CMOS and scales into future SOI and FinFET technologies.