Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Bruce K. Holmer"'
Publikováno v:
Journal of Parallel and Distributed Computing. 61:567-580
Mesh partitioning is an important step for parallel scientific applications, in particular finite element analyses. A good partitioner will minimize both the time spent on local computation and on interprocessor communication. It is often the case th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::326e3a4740b93a8213bb297f3548db2d
https://doi.org/10.1006/jpdc.2001.1701
https://doi.org/10.1006/jpdc.2001.1701
Autor:
Michael J. Carlton, Vason P. Srini, Georges E. Smine, Bruce K. Holmer, Darren R. Busing, Alvin M. Despain, Tam M. Nguyen
Publikováno v:
Journal of Systems Integration. 7:151-178
Aquarius-II is a cache coherent multiprocessor system designed for the parallel execution of Prolog programs. It contains two tiers of memory: synchronization memory and high bandwidth (HB) memory. The synchronization memory consists of snooping cach
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::061b5063e1f31ecb9da8c0f0cb0d0b2d
https://doi.org/10.1023/a:1008211321698
https://doi.org/10.1023/a:1008211321698
Publikováno v:
The Journal of Logic Programming. 29:107-139
Most Prolog machines have been based on specialized architectures. Our goal is to start with a general-purpose architecture and determine a minimal set of extensions for high-performance Prolog execution. We have developed both the architecture and o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9a04e40e6f0eeac4c72a1d15646abf95
https://doi.org/10.1016/s0743-1066(96)88981-3
https://doi.org/10.1016/s0743-1066(96)88981-3
Publikováno v:
IOPADS
Parity-declustered data layouts were developed to reduce the time for on-line failure recovery in disk arrays. They generally require perfect balancing of reconstruction workload among the disks; this restrictive balance condition makes such data lay
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e892079d237df52741e84ac3aebc4e5e
https://doi.org/10.1145/236017.236031
https://doi.org/10.1145/236017.236031
Publikováno v:
HICSS (1)
We propose a domain decomposition scheme that seeks to minimize total parallel execution time by considering the relative importance of two competing concerns-balancing the load and minimizing communication for a particular application and architectu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ccdfe0e447078b2c2c815d8cbd41c0e
https://doi.org/10.1109/hicss.1996.495509
https://doi.org/10.1109/hicss.1996.495509
Autor:
Bruce K. Holmer, Jonathan P. Vogel
Publikováno v:
MICRO
The HP-PA instruction set allows any arithmetic instruction to conditionally skip the following instruction based on the result of the arithmetic calculation. We have isolated this architectural feature and measured its performance benefit on a set o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5017ca5ccf0a3318830fdce0e9376b1b
https://doi.org/10.1145/192724.192754
https://doi.org/10.1145/192724.192754
Autor:
Alvin M. Despain, Bruce K. Holmer
Publikováno v:
MICRO
This paper reviews past attempts to systematize instruction set design and offers an alternative approach. Our technique is based on compaction of microoperations to form instructions. The compaction is done in such a way as to optimize a metric whic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::039f4d0cfe6cdfe5e9bae74e53bdb044
https://doi.org/10.1145/123465.123497
https://doi.org/10.1145/123465.123497
Autor:
Alvin M. Despain, Tep Dobry, Ralph Haygood, Peter Van Roy, Joan M. Pendleton, Barton Sano, William R. Bush, Bruce K. Holmer, Michael J. Carlton
Publikováno v:
ISCA
Most Prolog machines have been based on specialized architectures. Our goal is to start with a general purpose architecture and determine a minimal set of extensions for high performance Prolog execution. We have developed both the architecture and o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6c7c8c1372e2fdbc46e9cf6b78b2d50d
https://doi.org/10.1145/325164.325154
https://doi.org/10.1145/325164.325154
We have designed and fabricated a high performance VLSI chip for executing Prolog programs using a 1.4 micron CMOS technology with two layers of metal. This chip implements a tagged architecture with hardware support for five stacks. The 32-bit data
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::892755d89b0882db689e6757fa32b005
https://doi.org/10.21236/ada198304
https://doi.org/10.21236/ada198304
Autor:
Bruce K. Holmer
This document describes the VLSI-PLM instruction set and includes small programs to test details of its implementation. The VLSI-PLM is a single chip implementation of the PLM, a WAM based instruction set for the execution of Prolog. The instruction
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::312a87a119c405384689cc44fe00b420
https://doi.org/10.21236/ada632225
https://doi.org/10.21236/ada632225