Zobrazeno 1 - 10
of 82
pro vyhledávání: '"Branch predication"'
Autor:
I. Yu. Sesin, R. G. Bolbakov
Publikováno v:
Российский технологический журнал, Vol 9, Iss 6, Pp 7-15 (2021)
General Purpose computing for Graphical Processing Units (GPGPU) technology is a powerful tool for offloading parallel data processing tasks to Graphical Processing Units (GPUs). This technology finds its use in variety of domains – from science an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6112787ab8427cbc87a5e05b02f6f523
https://doi.org/10.32362/2500-316x-2021-9-6-7-15
https://doi.org/10.32362/2500-316x-2021-9-6-7-15
Publikováno v:
SQUADE@ESEC/SIGSOFT FSE
It is well known that once a Java application uses native C/C++ methods through the Java Native Interface (JNI), any security guarantees provided by Java might be invalidated by the native methods. So any vulnerability in this trusted native code can
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::58f1cf6f2de0ff336891e849f914d0ab
https://doi.org/10.1145/3340495.3342749
https://doi.org/10.1145/3340495.3342749
Publikováno v:
ICS
When vectorizing programs for modern processors with SIMD extensions, IF-statements pose a challenge: existing vectorization approaches often introduce redundant computations or they resort to inefficient masked instructions. In this paper, we introd
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fdf9fad5f80ad241aad06024be2f94d4
https://doi.org/10.1145/3330345.3331059
https://doi.org/10.1145/3330345.3331059
Publikováno v:
IEEE Latin America Transactions. 14:2491-2497
Strategies to parallelize applications is one way to increase performance in computer architectures. In addition to the hardware organization, some techniques are adopted, maintaining its architecture or instruction set, in order to increase the flow
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54f407270aab339421f05b49ce9dcb53
https://doi.org/10.1109/tla.2016.7530450
https://doi.org/10.1109/tla.2016.7530450
Publikováno v:
IEIE Transactions on Smart Processing and Computing. 4:366-370
This paper proposes a method for improving a branch predictor for the extendable instruction set computer (EISC) processor. The original EISC branch predictor has several shortcomings: a small branch target buffer, absence of a global history, a one-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be486f0a4c7109baa21ff0d2eebccf0f
https://doi.org/10.5573/ieiespc.2015.4.5.366
https://doi.org/10.5573/ieiespc.2015.4.5.366
Autor:
Rashidah Funke Olanrewaju, Ridzwan Alahudin, Fawwaz Eniola Fajingbesi, S. B. Junaid, Bisma Rasol pampori, Farhat Anwar
Publikováno v:
Indian Journal of Science and Technology. 10
In modern computing, multitasking is the most favorable aspect. An un-pipelined instruction cycle (fetch-execute cycle) CPU processes instructions one after another increasing duration at lesser speed in completing tasks. With pipelined computer arch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::713e2533f815386934bf1bcca9e566c2
https://doi.org/10.17485/ijst/2017/v10i3/110622
https://doi.org/10.17485/ijst/2017/v10i3/110622
Publikováno v:
Frontiers of Computer Science. 7:914-923
In theory, branch predictors with more complicated algorithms and larger data structures provide more accurate predictions. Unfortunately, overly large structures and excessively complicated algorithms cannot be implemented because of their long acce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e4e408f603a30968557a0b9ef02627da
https://doi.org/10.1007/s11704-013-2260-x
https://doi.org/10.1007/s11704-013-2260-x
Publikováno v:
Advanced Science Letters. 19:1516-1519
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a432a75b26a6ddfb4785bce70734964c
https://doi.org/10.1166/asl.2013.4478
https://doi.org/10.1166/asl.2013.4478
Autor:
Larry D. Pyeatt
This chapter explains how a particular assembly language is related to the architectural design of a particular CPU family. It then gives an overview of the ARM architecture. Next, it describes the ARM register set and data paths, including the Proce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::61df10012432b1fa62d138127de6801a
https://doi.org/10.1016/b978-0-12-803698-3.00003-6
https://doi.org/10.1016/b978-0-12-803698-3.00003-6
Publikováno v:
Applied Mechanics and Materials. :4952-4957
Researched how the multi-pipeline processor accelerates the running of thread ,found that when the branch predictor facing the random branch instruction, the hit rate will become very low, so bring out a new method that using the free pipeline to acc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f4e496dc72c505f860ff144140d1863
https://doi.org/10.4028/www.scientific.net/amm.204-208.4952
https://doi.org/10.4028/www.scientific.net/amm.204-208.4952