Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Brahamdeo Prasad Singh"'
Publikováno v:
International Journal of Sensors, Wireless Communications and Control. 10:55-62
Background & Objective: In this paper, a modified pseudo domino configuration has been proposed to improve the leakage power consumption and Power Delay Product (PDP) of dynamic logic using Carbon Nanotube MOSFETs (CN-MOSFETs). The simulations for pr
Publikováno v:
Micro and Nanosystems. 12:58-67
Background: Main concern in efficient VLSI circuit designing is low-power consumption, high-speed and noise tolerance capability. Objective: In this paper, two efficient and high-performance topologies are proposed for cascaded domino logic using car
Publikováno v:
Advances in Intelligent Systems and Computing ISBN: 9789811503238
In this article, a new improved domino logic-based topology is proposed for achieving improved leakage current performance using negative differential resistance (NDR) keeper circuit. The NDR keeper is used to preserve the correct output level and re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f5ebc6b1d44dda366ee6a760594e8a7f
https://doi.org/10.1007/978-981-15-0324-5_27
https://doi.org/10.1007/978-981-15-0324-5_27
Publikováno v:
2016 International Conference on Information Technology (InCITe) - The Next Generation IT Summit on the Theme - Internet of Things: Connect your Worlds.
The dynamic circuits propose superior speed and low power dissipation over static CMOS circuits. The domino logic circuits are used for high system performance but these circuits suffer from the degradation of the precharge pulse. Therefore, this art
Publikováno v:
2015 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT).
Dynamic domino logic circuits are used for high system performance. The dynamic circuits offer superior speed and power dissipation over static CMOS circuits. But these circuits suffer from limitations such as charge leakage, noise and charge sharing