Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Boris Heitz"'
Publikováno v:
Solid-State Electronics. 89:17-21
The purpose of this paper is to describe a preliminary approach to achieve a sigmoid neuron transistor response using the 28 nm high- k metal gate Fully Depleted SOI (FDSOI) technology. It is well known that a neural network is an ambitious way to ha
Publikováno v:
2015 37th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
Advanced CMOS Technologies, and particularly Ultra-Thin Body and BOX Fully Depleted Silicon on Insulator (UTBB-FDSOI) technology provide good performances for analog high frequency and ultra-low power applications. We present in this paper self-ESD-p
Autor:
Philippe Galy, Jean-Michel Fournier, T. Lim, Philippe Benech, Johan Bourgeat, Boris Heitz, Jean Jimenez
The vertical shrinkage of the advanced CMOS processes thicknesses makes electrostatic discharge (ESD) issues become more significant. RF and millimeter-wave (mm-wave) circuits are very sensitive to the ESD components’ capacitive parasitic effect. S
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d8710c686ff38e49812ab81716f93578
https://publica.fraunhofer.de/handle/publica/246043
https://publica.fraunhofer.de/handle/publica/246043
Autor:
Jean Jimenez, Johan Bourgeat, D. Marin-Cudraz, Boris Heitz, Philippe Galy, T. Lim, Ph. Benech, Jean-Michel Fournier
Publikováno v:
ESREF 2013
ESREF 2013, Sep 2013, Arcachon, France. pp.1-4
ESREF 2013, Sep 2013, Arcachon, France. pp.1-4
The aim of this paper is to present an ESD solution to address several challenges. The first challenge is to obtain a robust ESD protection with symmetrical response under ±1 kV HBM. And the second one is to reach 100 GHz broadband for RF applicatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9182b065df13e373022a5495c8986743
https://hal.archives-ouvertes.fr/hal-00997047
https://hal.archives-ouvertes.fr/hal-00997047
Autor:
Jean-Michel Fournier, Ph. Benech, Ph. Galy, Jean Jimenez, Boris Heitz, D. Marin-Cudraz, T. Lim
Publikováno v:
ICICDT
The aim purpose of this study is to evaluate the ESD protection using BIMOS transistor in the RF and fast swing application for advanced CMOS technology in 32 nm high k metal gate & bulk substrate. The ESD target is 1kV HBM and the RF one is 100 GHz
Publikováno v:
2012 Asia Pacific Microwave Conference Proceedings.
Advanced CMOS technologies provide an easier way to realize radio-frequency integrated circuits (RFICs). However, transistor gates are getting smaller and electrostatic discharges (ESD) issues become more significant. Unfortunately, ESD protections p
Publikováno v:
2012 IEEE International Integrated Reliability Workshop Final Report.
Advanced CMOS technologies provide an easy way to realize radio-frequency integrated circuits (RFICs). However, transistor gates are getting smaller and electrostatic discharge (ESD) issues become more significant. Unfortunately, parasitic capacitanc
Publikováno v:
2012 International Semiconductor Conference Dresden-Grenoble (ISCDG).
Advanced CMOS technologies provide an easier way to realize radio-frequency integrated circuits (RFICs). However, transistor gates are getting smaller and electrostatic discharges (ESD) issues become more significant. Unfortunately, ESD protections p
Publikováno v:
ICICDT
High speed interface are more and more integrated on System On Chip (SOC) and need efficient Electro Static Discharge (ESD) protections devices. The challenge is to ensure high level of ESD protection in a very large bandwidth to address HDMI, SATA,
Autor:
Ph. Galy, Ghislain Troussier, D. Marin-Cudraz, Johan Bourgeat, Nicolas Guitard, Boris Heitz, Jean Jimenez, Alexandre Dray, H. Beckrich-Ros
Publikováno v:
ICICDT
BIMOS transistor is a useful device and now compliant in advanced CMOS technology. This device acts with high controlled current gain. Thus, it is an efficient candidate for Electrostatic Discharge (ESD) protection. Moreover it is well known that ESD