Zobrazeno 1 - 10
of 127
pro vyhledávání: '"Boland, David"'
Publikováno v:
ACM Transactions on Reconfigurable Technology and Systems(TRETS),16, 3, Article 42 (2023). Journal Track of The International Conference on Field Programmable Technology (FPT'22), Hong Kong SAR, China
Machine learning ensembles combine multiple base models to produce a more accurate output. They can be applied to a range of machine learning problems, including anomaly detection. In this paper, we investigate how to maximize the composability and s
Externí odkaz:
http://arxiv.org/abs/2406.05999
Publikováno v:
International Conference on Field-Programmable Logic and Applications (FPL2024) in Turin, Italy, from 2nd to 6th September 2024
FPGAs have distinct advantages as a technology for deploying deep neural networks (DNNs) at the edge. Lookup Table (LUT) based networks, where neurons are directly modeled using LUTs, help maximize this promise of offering ultra-low latency and high
Externí odkaz:
http://arxiv.org/abs/2406.04910
Publikováno v:
JMIR mHealth and uHealth, Vol 8, Iss 7, p e13737 (2020)
BackgroundThere has been a recent increased interest in monitoring health using wearable sensor technologies; however, few have focused on breathing. The ability to monitor breathing metrics may have indications both for general health as well as res
Externí odkaz:
https://doaj.org/article/a0ffde27468644ea97d19f35a3ee1b05
Autor:
Rasoulinezhad, SeyedRamin, Siddhartha, Zhou, Hao, Wang, Lingli, Boland, David, Leong, Philip H. W.
We propose two tiers of modifications to FPGA logic cell architecture to deliver a variety of performance and utilization benefits with only minor area overheads. In the irst tier, we augment existing commercial logic cell datapaths with a 6-input XO
Externí odkaz:
http://arxiv.org/abs/2003.03043
Autor:
Rasoulinezhad, Seyedramin, Fox, Sean, Zhou, Hao, Wang, Lingli, Boland, David, Leong, Philip H. W.
Publikováno v:
International Conference on Field-Programmable Technology, {FPT} 2019,Tianjin, China, December 9-13, 2019
Binarized neural networks (BNNs) have shown exciting potential for utilising neural networks in embedded implementations where area, energy and latency constraints are paramount. With BNNs, multiply-accumulate (MAC) operations can be simplified to Xn
Externí odkaz:
http://arxiv.org/abs/2002.12900
Autor:
Faraone, Julian, Kumm, Martin, Hardieck, Martin, Zipf, Peter, Liu, Xueyuan, Boland, David, Leong, Philip H. W.
Low-precision arithmetic operations to accelerate deep-learning applications on field-programmable gate arrays (FPGAs) have been studied extensively, because they offer the potential to save silicon area or increase throughput. However, these benefit
Externí odkaz:
http://arxiv.org/abs/1911.08097
Autor:
Tridgell, Stephen, Kumm, Martin, Hardieck, Martin, Boland, David, Moss, Duncan, Zipf, Peter, Leong, Philip H. W.
The computational complexity of neural networks for large scale or real-time applications necessitates hardware acceleration. Most approaches assume that the network architecture and parameters are unknown at design time, permitting usage in a large
Externí odkaz:
http://arxiv.org/abs/1909.04509
Autor:
Young, Brian A., Boland, David M., Manzo, Abby, Yaw, Haley, Carlson, Brian, Carrier, Spencer, Corcoran, Kameryn, Dial, Megan, Briggs, Robert B., Tragord, Bradley, Koppenhaver, Shane L.
Publikováno v:
In Journal of Manipulative and Physiological Therapeutics September 2022 45(7):531-542
Autor:
Teyhen, Deydre S., Capaldi, Vincent F., II, Drummond, Sean P.A., Rhon, Daniel I., Barrett, Amelia S., Silvernail, Jason L., Boland, David M.
Publikováno v:
In Journal of Science and Medicine in Sport October 2021 24(10):988-994
Autor:
Boland, David Peter
The precision used in an algorithm affects the error and performance of individual computations, the memory usage, and the potential parallelism for a fixed hardware budget. However, when migrating an algorithm onto hardware, the potential improvemen
Externí odkaz:
http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.544305