Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Blaise Tine"'
Autor:
Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Cooper, Hyesoon Kim
Publikováno v:
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3cc8ef97f31beee028547262a1d9281a
https://doi.org/10.1145/3582016.3582024
https://doi.org/10.1145/3582016.3582024
Autor:
Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeff Young, Hyesoon Kim
Publikováno v:
2022 IEEE Hot Chips 34 Symposium (HCS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::558863f7913242aac181c7f330a60b97
https://doi.org/10.1109/hcs55958.2022.9895607
https://doi.org/10.1109/hcs55958.2022.9895607
Publikováno v:
MICRO
The importance of open-source hardware and software has been increasing. However, despite GPUs being one of the more popular accelerators across various applications, there is very little open-source GPU infrastructure in the public domain. We argue
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6cb3bf75adcb97055b047ffce7fdbd40
https://doi.org/10.1145/3466752.3480128
https://doi.org/10.1145/3466752.3480128
Autor:
Yaotian Feng, Ethan Lyons, Lingjun Zhu, Fares Elsabbagh, Da Eun Shim, Priyadarshini Roshan, Apurve Chawda, Will Gulian, Blaise Tine, Hyesoon Kim, Sung Kyu Lim
Publikováno v:
2020 IEEE Hot Chips 32 Symposium (HCS).
The emergence of data parallel architectures have enabled new opportunities to address the power limitations and scalability of multi-core processors, allowing new ways to exploit the abundant data parallelism present in emerging big-data and machine
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3df7b684db4b105c804ee96cb68b0572
https://doi.org/10.1109/hcs49909.2020.9250188
https://doi.org/10.1109/hcs49909.2020.9250188
Publikováno v:
FPGA
With Moore's Law coming to an end, hardware specialization and systems on chips are providing new opportunities for continuing performance scaling while reducing the energy cost of computation. However, the current hardware design methodologies requi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::67250d4275814fd75ed3070a44ac463e
https://doi.org/10.1145/3373087.3375340
https://doi.org/10.1145/3373087.3375340
Publikováno v:
FPGA
Current High-Level Synthesis frameworks provide a productive hardware development methodology where hardware accelerators are generated directly from high-level languages like C/C++ or OpenCL, allowing software developers to quickly accelerate their
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0845807a1cbc2d0b6a4e7eb6ff526d72
https://doi.org/10.1145/3373087.3375338
https://doi.org/10.1145/3373087.3375338