Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Benjamin Carrion Schaefer"'
Autor:
Tejinder Kaur, Axel Gamez, Jose-Luis Olvera-Cervantes, Benjamin Carrion Schaefer, Alonso Corona-Chavez
Publikováno v:
IEEE Access, Vol 11, Pp 66456-66466 (2023)
In this work we propose a method to detect turmeric adulteration using the Cavity Perturbation Technique (CPT) at 2.4GHz. Two different adulterants are examined (egg-yellow color and starch). We show that when a single adulterant is added, the resona
Externí odkaz:
https://doaj.org/article/be19b23d134c424e9eadf3114a104aaa
Publikováno v:
Integration. 88:116-124
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::571405c271e4af325d2e1062a9bf9850
https://doi.org/10.1016/j.vlsi.2022.09.006
https://doi.org/10.1016/j.vlsi.2022.09.006
Autor:
Qilin Si, Benjamin Carrion Schaefer
Publikováno v:
Proceedings of the Great Lakes Symposium on VLSI 2023.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bd31153e79a6c51da35e7d7cceaf9163
https://doi.org/10.1145/3583781.3590214
https://doi.org/10.1145/3583781.3590214
Autor:
Qilin Si, Benjamin Carrion Schaefer
Publikováno v:
Proceedings of the Great Lakes Symposium on VLSI 2023.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::06dc6c71059842b1aadebb2c3cb3ea66
https://doi.org/10.1145/3583781.3590277
https://doi.org/10.1145/3583781.3590277
Publikováno v:
ACM/IEEE International Symposium on Low Power Electronics and Design.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b5bf897c2f5e7a8e25a26d744bd0a5a4
https://doi.org/10.1145/3531437.3539728
https://doi.org/10.1145/3531437.3539728
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95beda252611003cb0a6bd86b7a2b9a0
https://doi.org/10.1109/iscas48785.2022.9937493
https://doi.org/10.1109/iscas48785.2022.9937493
Publikováno v:
2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4bf26cb73adfdf10728d756ca4ad2259
https://doi.org/10.1109/asp-dac52403.2022.9712582
https://doi.org/10.1109/asp-dac52403.2022.9712582
Publikováno v:
Electronics
Volume 10
Issue 14
Electronics, Vol 10, Iss 1746, p 1746 (2021)
Volume 10
Issue 14
Electronics, Vol 10, Iss 1746, p 1746 (2021)
High-Level Synthesis (HLS) dramatically accelerates the design and verification of individual components within larger VLSI systems. With most complex Integrated Circuits (ICs) being now heterogeneous Systems-on-Chip (SoCs), HLS has been traditionall
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::30d2c5c1635a03deafd8d680b137039d
Publikováno v:
DATE
Shrinking transistor sizes are jeopardizing the reliability of runtime reconfigurable Field Programmable Gate Arrays (FPGAs), making them increasingly sensitive to aging effects such as Negative Bias Temperature Instability (NBTI). This paper introdu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f2ac56c423ac33ec5163b2d11b37734c
https://doi.org/10.23919/date48585.2020.9116537
https://doi.org/10.23919/date48585.2020.9116537
Publikováno v:
FPT
Contemporary coarse-grained runtime reconfigurable architectures (CGRRAs) are increasingly sensitive to aging effects such as Negative Bias Temperature Instability (NBTI). To address this, we propose a reliability-aware floorplanner for CGRRAs based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::88f49fff2ee05d806a59aa813905acb6
https://doi.org/10.1109/icfpt47387.2019.00050
https://doi.org/10.1109/icfpt47387.2019.00050