Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Beak-Hyung Cho"'
Autor:
Hye-Jin Kim, Won-Ryul Chung, Sang-beom Kang, Chang-han Choi, Yong-Jin Yoon, Mu-Hui Park, Yu-Hwan Ro, Woo-Yeong Cho, Ki-Sung Kim, Young-Ran Kim, Chang-Hyun Kim, Du-Eung Kim, Beak-Hyung Cho, Byung-Gil Choi, Joon-Min Park, Hongsik Jeong, Kwang-Suk Yu, In-Cheol Shin, Kwang-Jin Lee, Chang-Soo Lee, Gitae Jeong, Choong-keun Kwak, Ki-won Lim, Qi Wang, Joon-Yong Choi, Kinam Kim, Hyung-Rok Oh, Ho-Keun Cho
Publikováno v:
IEEE Journal of Solid-State Circuits. 43:150-162
A 512 Mb diode-switch PRAM has been developed in a 90 nm CMOS technology. The vertical diode-switch using the SEG technology has achieved minimum cell size and disturbance-free core operation. A core configuration, read/write circuit techniques, and
Autor:
Hyung-Rok Oh, Woo Yeong Cho, Kinam Kim, Du-Eung Kim, Su-Yeon Kim, Qi Wang, Hyun-Geun Byun, Byung-Gil Choi, Chang-Soo Lee, Kwang-Jin Lee, Sang-beom Kang, Gitae Jeong, Mu-Hui Park, Young-Ran Kim, Beak-Hyung Cho, Hongsik Jeong, Yun-Seung Shin, Ki-Sung Kim, Yu Hwan Ro, Choong-keun Kwak, Hye-Jin Kim, Choong-Duk Ha
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:210-218
A 256-Mb phase-change random access memory has been developed, featuring 66-MHz synchronous burst-read operation. Using a charge pump system, write performance was characterized at a low supply voltage of 1.8 V. Measured initial read access time and
Autor:
Sang-beom Kang, Du-Eung Kim, Byung-Gil Choi, Gitae Jeong, Beak-Hyung Cho, Kinam Kim, Hyung-Rok Oh, Hyun-Geun Byun, Woo Yeong Cho, Hye-Jin Kim, Ki-Sung Kim, Choong-keun Kwak, Hongsik Jeong
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:122-126
The write performance of the 1.8-V 64-Mb phase-change random access memory (PRAM) has been improved, which was developed based on 0.12-/spl mu/m CMOS technology. For the improvement of RESET and SET distributions, a cell current regulator scheme and
Autor:
Sung-Hoon Kim, Yong-Jun Lee, Byung-Hoon Jeong, Sang-Tae Kim, Jung Sunwoo, HoGeun Cho, Jin-Young Kim, Sunghyun Jun, Inchul Shin, Hoe-ju Chung, Woo-Yeong Cho, Jae-Wook Lee, Woochul Jun, Jun-Ho Shin, Joon-Min Park, Chang-han Choi, Qi Wang, Young-don Choi, Young-Hyun Jun, Ki-whan Song, Byung-Jun Min, KiSeung Kim, Jei-Hwan Yoo, Mu-Hui Park, Yoohwan Rho, Won-Ryul Chung, Seok-Won Hwang, Sang-whan Chang, Ickhyun Song, Ki-won Lim, Beak-Hyung Cho, Kwang-Jin Lee, Sooho Cha, Jaewhan Kim, Duk-Min Kwon
Publikováno v:
ISSCC
In mobile systems, the demand for the energy saving continues to require a low power memory sub-system. During the last decade, the floating-gate flash memory has been an indispensable low power memory solution. However, NOR flash memory has begun to
Autor:
Woo-Yeong Cho, Qi Wang, Kinam Kim, Chang-han Choi, Du-Eung Kim, Hongsik Jeong, Yu-Hwan Ro, Joon-Min Park, Byung-Gil Choi, Hye-Jin Kim, Won-Ryul Chung, Ho-Keun Cho, Young-Ran Kim, Beak-Hyung Cho, Ki-Sung Kim, Joon-Yong Choi, Sang-beom Kang, In-Cheol Shin, Kwang-Jin Lee, Ki-won Lim, Mu-Hui Park, Choong-keun Kwak, Chang-Hyun Kim, Kwang-Suk Yu, Chang-Soo Lee, Gitae Jeong, Hyung-Rok Oh
Publikováno v:
ISSCC
A 512Mb diode-switch PRAM is developed in a 90nm CMOS technology. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are described. Through these schemes, the PRAM achieves read throughput of 266MB
Autor:
Qi Wang, Ki-Sung Kim, Choong-Ryeol Hwang, Choong-Duk Ha, Chang-Soo Lee, Kwang-Jin Lee, Mu-Hui Park, Hye-Jin Kim, Du-Eung Kim, Choong-keun Kwak, Kang-Sik Cho, Su-Yeon Kim, Byung-Gil Choi, Sang-beom Kang, Yun Sueng Shin, Hyung-rock Oh, Woo-Yeong Cho, Yu-Hwan Ro, Young-Ran Kim, Beak-Hyung Cho, Hyun-Geun Byun
Publikováno v:
2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
A 256Mb PRAM featuring synchronous burst read operation is developed. Using a charge-pump system, write performance is characterized at 1.8V supply. Measured initial read access time and burst-read access time are 62ns and 10ns, respectively. The max
Autor:
Sang-beom Kang, Hyung-Rok Oh, Young-Nam Hwang, Beak-Hyung Cho, Ki-Sung Kim, Suseob Ahn, Du-Eung Kim, Hongsik Jeong, Byung-Gil Choi, Kyung-Hee Kim, Hyun-Geun Byun, Gwan-Hyeob Koh, Choong-keun Kwak, Kinam Kim, Gitae Jeong, Woo Yeong Cho
Publikováno v:
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
A nonvolatile 64-Mb 1T1R phase-transition random access memory (PRAM) has been developed by fully integrating chalcogenied storage material (GST: Ge/sub 2/Sb/sub 2/Te/sub 5/) into 0.18-/spl mu/m CMOS technology. To optimize SET/RESET distribution, 51
Autor:
Kwang-Jin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Chang-Soo Lee, Hye-Jin Kim, Joon-Min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-Won Lim, Ho-Keun Cho, Chang-Han Choi, Won-Ryul Chung
Publikováno v:
2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers; 2007, p472-616, 145p
Autor:
Sangbeom Kang, WooYeong Cho, Beak-Hyung Cho, Kwang-Jin Lee, Chang-Soo Lee, Hyung-Rock Oh, Byung-Gil Choi, Qi Wang, Hye-Jin Kim, Mu-Hui Park, Yu-Hwan Ro, Suyeon Kim, Du-Eung Kim, Kang-Sik Cho, Choong-Duk Ha, Youngran Kim, Ki-Sung Kim, Choong-Ryeol Hwang, Choong-Keun Kwak, Hyun-Geun Byun
Publikováno v:
2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers; 2006, p487-496, 10p
Autor:
Kwang-Jin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Chang-Soo Lee, Hye-Jin Kim, Joon-Min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-Won Lim, Ho-Keun Cho, Chang-Han Choi, Won-Ryul Chung
Publikováno v:
IEEE Journal of Solid-State Circuits; Jan2008, Vol. 43 Issue 1, p150-162, 13p, 1 Black and White Photograph, 1 Diagram, 1 Chart, 1 Graph