Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Bartholomew Blaner"'
Autor:
Bulent Abali, B. C. Drerup, Bartholomew Blaner, F. A. Campisano, R. B. Leavens, Ronald Nick Kalla, Derek Edward Williams, E. N. Lais, S. M. Willenborg, Michael Stephen Floyd, Guy Lynn Guthrie, Charles F. Marino, L. B. Arimilli
Publikováno v:
IBM Journal of Research and Development. 62:1:1-1:11
IBM POWER9 is a family of processor chips designed to serve a diverse set of workloads. New features have been added to POWER9 to address emerging workloads such as cognitive and artificial intelligence applications. POWER9 also further enhances feat
Autor:
C. Wollbrink, L. B. Arimilli, B. Allison, Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, J. D. Irish, Daniel M. Dreps
Publikováno v:
IBM Journal of Research and Development. 62:8:1-8:8
Open Coherent Accelerator Processor Interface (OpenCAPI) is a new industry-standard device interface that enables the development of host-agnostic devices that can coherently connect to any host platform that supports the OpenCAPI standard. This in t
Publikováno v:
IBM Journal of Research and Development. 38:59-78
Autor:
James Edward Phillips, Nadeem Malik, Bartholomew Blaner, Stamatis Vassiliadis, Richard J. Eickemeyer
Publikováno v:
Proceedings of Phoenix Conference on Computers and Communications.
A study was initiated that investigated detractors to parallelism and implementation constraints associated with the critical paths in the design of fine grain parallel machines. The outcome of the research has been a new machine organization that fa
Autor:
Ronald Nick Kalla, Bartholomew Blaner, Steven R. Kunkel, Bulent Abali, R. B. Leavens, B. M. Bass, Peter A. Sandon, Kenneth A. Lauricella, S. Chari, John J. Reilly
Publikováno v:
IBM Journal of Research and Development. 57:3:1-3:16
With the heightened focus on computer security, IBM POWER® server workloads are spending an increasing number of cycles performing cryptographic functions. Active memory expansion (AME), a technology to dynamically increase the effective memory capa
Autor:
Jeffrey A. Stuecheli, Jentje Leenstra, Hung Qui Le, Dung Quoc Nguyen, Guy Lynn Guthrie, J. A. Van Norstrand, Ronald Nick Kalla, Balaram Sinharoy, Bartholomew Blaner, W. J. Starke, Eric E. Retter, Robert Alan Cargnoni, Peter Williams, Bruce Joseph Ronchetti, Charles F. Marino
Publikováno v:
IBM Journal of Research and Development. 55:1:1-1:29
The IBM POWER® processor is the dominant reduced instruction set computing microprocessor in the world today, with a rich history of implementation and innovation over the last 20 years. In this paper, we describe the key features of the POWER7® pr