Zobrazeno 1 - 10
of 200
pro vyhledávání: '"Barkalov Alexander"'
Publikováno v:
International Journal of Applied Mathematics and Computer Science, Vol 34, Iss 1, Pp 167-178 (2024)
In many digital systems, various sequential blocks are used. This paper is devoted to the case where the model of a Mealy finite state machine (FSM) represents the behaviour of a sequential block. The chip area occupied by an FSM circuit is one of th
Externí odkaz:
https://doaj.org/article/2154bca1a41b4c008d8b929f5ab6a1d9
Publikováno v:
International Journal of Applied Mathematics and Computer Science, Vol 32, Iss 3, Pp 479-494 (2022)
A method is proposed which aims at reducing the number of LUTs in the circuits of FPGA-based Mealy finite state machines (FSMs) with transformation of collections of outputs into state codes. The reduction is achieved due to the use of two-component
Externí odkaz:
https://doaj.org/article/f091f5a9df254d51b501f3e1ae4b38da
Publikováno v:
International Journal of Applied Mathematics and Computer Science, Vol 30, Iss 4, Pp 745-759 (2020)
Practically, any digital system includes sequential blocks represented using a model of finite state machine (FSM). It is very important to improve such FSM characteristics as the number of logic elements used, operating frequency and consumed energy
Externí odkaz:
https://doaj.org/article/fdd4cf2f5b9f4b4c8961e579e84285cb
Publikováno v:
International Journal of Applied Mathematics and Computer Science, Vol 28, Iss 3, Pp 595-607 (2018)
A method is proposed targeting a decrease in the number of LUTs in circuits of FPGA-based Mealy FSMs. The method improves hardware consumption for Mealy FSMs with the encoding of collections of output variables. The approach is based on constructing
Externí odkaz:
https://doaj.org/article/71c1ea2911044f82bbaba20f76507a6b
