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Publikováno v:
IOSR journal of VLSI and Signal Processing. 4:38-45
A device core logic testing of analog signals with minimal area overhead for measuring on chip voltages in digital circuits can be adopted by built-in-self-test in a distributed architecture. Here for measuring this analog voltage, the subsampled sig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c00425ed56e110ecd4a8251c9682414
https://doi.org/10.9790/4200-04433845
https://doi.org/10.9790/4200-04433845
