Circuit simulation of floating-gate FET (FGFET) for logic application

Autor: Kim, Yunjae, Kim, Hyoungsoo, Jeon, Jongwook, Baik, Seungjae, Kang, Myounggon

Publikováno v: In Memories - Materials, Devices, Circuits and Systems December 2023 6

Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.

Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.

Enhancing simulation feasibility for multi-layer 2D MoS 2 RRAM devices: reliability performance learnings from a passive network model.

Autor: Lee S; School of Electrical and Computer Engineering, University of Seoul, Seoul 02504, South Korea., Huang Y; Department of Electrical and Computer Engineering, University of Texas at Austin, 10100 Burnet Road, 78758 Austin, TX, USA., Chang YF; Intel Corporation, 2501 NE Century Road, 97124 Hillsboro, OR, USA., Baik S; Semiconductor Research and Development Center, Samsung Electronics, Hwaseong-si 18448, South Korea., Lee JC; Department of Electrical and Computer Engineering, University of Texas at Austin, 10100 Burnet Road, 78758 Austin, TX, USA., Koo M; Department of Computer Science and Engineering, Incheon National University, Incheon 22012, South Korea. koo@inu.ac.kr.

Publikováno v: Physical chemistry chemical physics : PCCP [Phys Chem Chem Phys] 2024 Aug 07; Vol. 26 (31), pp. 20962-20970. Date of Electronic Publication: 2024 Aug 07.