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pro vyhledávání: '"BRACCIOLI, MARCO"'
Autor:
Braccioli, Marco <1979>
The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizi
Externí odkaz:
http://amsdottorato.unibo.it/1515/
We study the impact of self-heating on device characteristics to compare advantages of double-gate silicon on insulator (DGSOI) over bulk technology. Performance comparison of digital circuits like three stage ring oscillator has been made. Impact of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4094::c9e7ba15729865747e5e1bb3b13d2387
http://hdl.handle.net/11585/88579
http://hdl.handle.net/11585/88579
This paper presents detailed DC and AC numerical simulations of thermal effects in nanoscale FinFET devices. Three–dimensional electro–thermal numerical simulations, including a realistic description of the source, drain and gate interconnections
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4094::f021d77764376845038064befd5f408a
http://hdl.handle.net/11585/88580
http://hdl.handle.net/11585/88580
In this paper we apply 3D Drift Diffusion Electro-Thermal simulations to the analysis of SHE in different Silicon On Insulator structures, featuring the same isothermal electrical characteristics.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4094::305be2b51b607698ff6454ad3155e58a
http://hdl.handle.net/11585/58528
http://hdl.handle.net/11585/58528
This paper presents a detailed thermal analysis of nanoscale FinFET devices. A three-dimensional electro-thermal device simulator, calibrated against Monte Carlo simulations at various temperatures, is adopted in order to study self-heating effects i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4094::292e91d88cefdd44989426543850c544
http://hdl.handle.net/11585/61038
http://hdl.handle.net/11585/61038
Autor:
BRACCIOLI, MARCO, FIEGNA, CLAUDIO, SANGIORGI, ENRICO, P. Palestri, T. Poiroux, M. Vinet, G. Le Carval, M. Mouis
Full-band Monte Carlo simulation of short-channel Double-Gate SOI MOSFETs were used to assess possible improvement of drain current in devices featuring conduction-band offsets between the source and the channel, obyained adopting non-conventional ma
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4094::ed2fda3ea23a1fd5aca226bc0f50950c
http://hdl.handle.net/11585/46091
http://hdl.handle.net/11585/46091
We apply state-of-the-art simulation to investigate the possibility to scale the UTB-DG MOSFET using rather conventional SiO2-based dielectrics with a minimum thickness of 1 nm, a lower limit set by the need for process yield and reproducibility. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4094::8be932e2fb834472d42ebac7ffe4c82d
http://hdl.handle.net/11585/22324
http://hdl.handle.net/11585/22324
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