Zobrazeno 1 - 10
of 18
pro vyhledávání: '"BOSTANCI, F. NISA"'
Autor:
Yuksel, Ismail Emir, Tugrul, Yahya Can, Bostanci, F. Nisa, Oliveira, Geraldo F., Yaglikci, A. Giray, Olgun, Ataberk, Soysal, Melina, Luo, Haocong, Gómez-Luna, Juan, Sadrosadati, Mohammad, Mutlu, Onur
We experimentally analyze the computational capability of commercial off-the-shelf (COTS) DRAM chips and the robustness of these capabilities under various timing delays between DRAM commands, data patterns, temperature, and voltage levels. We extens
Externí odkaz:
http://arxiv.org/abs/2405.06081
Autor:
Kanellopoulos, Konstantinos, Bostanci, F. Nisa, Olgun, Ataberk, Yaglikci, A. Giray, Yuksel, Ismail Emir, Ghiasi, Nika Mansouri, Bingol, Zulal, Sadrosadati, Mohammad, Mutlu, Onur
The adoption of processing-in-memory (PiM) architectures has been gaining momentum because they provide high performance and low energy consumption by alleviating the data movement bottleneck. Yet, the security of such architectures has not been thor
Externí odkaz:
http://arxiv.org/abs/2404.11284
Autor:
Oliveira, Geraldo F., Olgun, Ataberk, Yağlıkçı, Abdullah Giray, Bostancı, F. Nisa, Gómez-Luna, Juan, Ghose, Saugata, Mutlu, Onur
Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a DRAM array's massive internal parallelism to execute very-wide data-parallel operations, in a single-instruction multiple-data (SIMD) fashion. However, DRAM rows' large
Externí odkaz:
http://arxiv.org/abs/2402.19080
Autor:
Bostanci, F. Nisa, Yuksel, Ismail Emir, Olgun, Ataberk, Kanellopoulos, Konstantinos, Tugrul, Yahya Can, Yaglikci, A. Giray, Sadrosadati, Mohammad, Mutlu, Onur
We propose a new RowHammer mitigation mechanism, CoMeT, that prevents RowHammer bitflips with low area, performance, and energy costs in DRAM-based systems at very low RowHammer thresholds. The key idea of CoMeT is to use low-cost and scalable hash-b
Externí odkaz:
http://arxiv.org/abs/2402.18769
Autor:
Yuksel, Ismail Emir, Tugrul, Yahya Can, Olgun, Ataberk, Bostanci, F. Nisa, Yaglikci, A. Giray, Oliveira, Geraldo F., Luo, Haocong, Gómez-Luna, Juan, Sadrosadati, Mohammad, Mutlu, Onur
Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the potential to reduce or eliminate costly data movement between process
Externí odkaz:
http://arxiv.org/abs/2402.18736
Autor:
Yuksel, Ismail Emir, Tugrul, Yahya Can, Bostanci, F. Nisa, Yaglikci, Abdullah Giray, Olgun, Ataberk, Oliveira, Geraldo F., Soysal, Melina, Luo, Haocong, Luna, Juan Gomez, Sadrosadati, Mohammad, Mutlu, Onur
Data movement between the processor and the main memory is a first-order obstacle against improving performance and energy efficiency in modern systems. To address this obstacle, Processing-using-Memory (PuM) is a promising approach where bulk-bitwis
Externí odkaz:
http://arxiv.org/abs/2312.02880
Autor:
Kanellopoulos, Konstantinos, Nam, Hong Chul, Bostanci, F. Nisa, Bera, Rahul, Sadrosadati, Mohammad, Kumar, Rakesh, Bartolini, Davide-Basilio, Mutlu, Onur
Address translation is a performance bottleneck in data-intensive workloads due to large datasets and irregular access patterns that lead to frequent high-latency page table walks (PTWs). PTWs can be reduced by using (i) large hardware TLBs or (ii) l
Externí odkaz:
http://arxiv.org/abs/2310.04158
Autor:
Luo, Haocong, Tuğrul, Yahya Can, Bostancı, F. Nisa, Olgun, Ataberk, Yağlıkçı, A. Giray, Mutlu, Onur
We present Ramulator 2.0, a highly modular and extensible DRAM simulator that enables rapid and agile implementation and evaluation of design changes in the memory controller and DRAM to meet the increasing research effort in improving the performanc
Externí odkaz:
http://arxiv.org/abs/2308.11030
Autor:
Yüksel, İsmail Emir, Olgun, Ataberk, Salami, Behzad, Bostancı, F. Nisa, Tuğrul, Yahya Can, Yağlıkçı, A. Giray, Ghiasi, Nika Mansouri, Mutlu, Onur, Ergin, Oğuz
Prior works propose SRAM-based TRNGs that extract entropy from SRAM arrays. SRAM arrays are widely used in a majority of specialized or general-purpose chips that perform the computation to store data inside the chip. Thus, SRAM-based TRNGs present a
Externí odkaz:
http://arxiv.org/abs/2211.10894
Autor:
Olgun, Ataberk, Bostanci, F. Nisa, Oliveira, Geraldo F., Tugrul, Yahya Can, Bera, Rahul, Yaglikci, A. Giray, Hassan, Hasan, Ergin, Oguz, Mutlu, Onur
We propose Sectored DRAM, a new, low-overhead DRAM substrate that reduces wasted energy by enabling fine-grained DRAM data transfers and DRAM row activation. Sectored DRAM leverages two key ideas to enable fine-grained data transfers and row activati
Externí odkaz:
http://arxiv.org/abs/2207.13795