Zobrazeno 1 - 4
of 4
pro vyhledávání: '"B. Kaminaka"'
Publikováno v:
VLSI Design
In this paper, we propose a new Variable Testability Measure (VTM) applied at the high-level synthesis stage of the circuit- design process. The proposed approach is based on Binary Decision Diagrams representing fully fhnctional blocks of a circuit,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::81a1cdcc147648420249f5f147c591de
https://doi.org/10.1109/icvd.1992.658054
https://doi.org/10.1109/icvd.1992.658054
Autor:
Yu, Xiaoming, Meng, Xinchao, Liu, Yutong, Wang, Xutong, Wang, Tian-Jing, Zhang, Ai, Li, Ning, Qi, Xin, Liu, Bao, Xu, Zheng-Yi
Publikováno v:
Plant Cell Reports; Feb2019, Vol. 38 Issue 2, p131-145, 15p
Autor:
Kagaris, D., Tragoudas, S.
Publikováno v:
Proceedings of 14th VLSI Test Symposium; 1996, p374-379, 6p
Autor:
Jiang, Mingyi, Zhang, Jianhua
Publikováno v:
Planta: An International Journal of Plant Biology; Oct2002, Vol. 215 Issue 6, p1022-1030, 9p