Zobrazeno 1 - 10
of 90
pro vyhledávání: '"B. J. Nathanson"'
Autor:
Subhrajit Bhattacharya, B. Gopalsamy, M. Wazlowski, Martin Ohmacht, B. J. Nathanson, Reinaldo A. Bergamaschi, D. J. Krolak, J. A. Marcella, Dirk Hoenicke, A. Gara, Valentina Salapura, Mark E. Giampapa, R. A. Haring
Publikováno v:
IBM Journal of Research and Development. 49:255-264
The Blue Gene®/L compute chip is a dual-processor system-on-a-chip capable of delivering an arithmetic peak performance of 5.6 gigaflops. To match the memory speed to the high compute performance, the system implements an aggressive three-level on-c
Autor:
Ralph Bellofatto, Dirk Hoenicke, R. A. Haring, Robert B. Tremaine, Martin Ohmacht, B. J. Nathanson, A. R. Umamaheshwaran, Dong Chen, Burkhard Steinmacher-Burow, Mark E. Giampapa, Pavlos M. Vranas, P. Heidelberger, M. Tsao, M. B. Dombrowa, Matthias A. Blumrich, Michael Wazlowski, R. Sharrar, N. R. Adiga, D.K. Beece, Suryabhan Singh, A. Gara
Publikováno v:
IBM Journal of Research and Development. 49:303-318
The Blue Gene®/L compute chip contains two PowerPC® 440 processor cores, private L2 prefetch caches, a shared L3 cache and double-data-rate synchronous dynamic random access memory (DDR SDRAM) memory controller, a collective network interface, a to
Autor:
R. F. Stucke, B. J. Nathanson, B. Aball, M. G. Atkins, Donald G. Grice, M. Tsao, Richard A. Swetz, Douglas J. Joseph, Peter H. Hochschild, Dennis G. Shea, Craig B. Stunkel, Carl A. Bender, P. R. Varker
Publikováno v:
IBM Systems Journal. 34:185-204
The heart of an IBM SP2™ system is the HighPerformance Switch, which is a low-latency, highbandwidth switching network that binds together RISC System/6000® processors. The switch incorporates a unique combination of topology and architectural fea
Autor:
M. Tsao, B. J. Nathanson, Douglas J. Joseph, Bulent Abali, Peter H. Hochschild, Craig B. Stunkel, Monty M. Denneau, P. R. Varker, Dennis G. Shea
Publikováno v:
IPPS
IBM's recently announced Scalable POWERparallel family of systems is based upon the Vulcan architecture, and the currently available 9076 SP1 parallel system utilizes fundamental Vulcan technology. The experimental Vulcan parallel processor is design
Autor:
Indira Nair, Geert Janssen, Martin Ohmacht, A. Wang, Thomas M. Gooding, B. J. Nathanson, M. Schaal, Burkhard Steinmacher-Burow
Publikováno v:
IBM Journal of Research and Development. 57:7:1-7:12
The memory subsystem of the IBM Blue Gene®/Q Compute chip features multi-versioning and access conflict detection. Its ordered and unordered transaction modes implement both speculative execution (SE) and transactional memory (TM). Blue Gene/Q's lar
Autor:
Reginasari, Annisa1 annisa.reginasari@mail.ugm.ac.id, Afiatin, Tina1, Subandi1, Patria, Bhina1, Muchlisah2
Publikováno v:
Qualitative Report. Oct2021, Vol. 26 Issue 10, p3234-3261. 28p.
Autor:
Leek, Joanna, Rojek, Marcin
Publikováno v:
Interactive Learning Environments; Oct2023, Vol. 31 Issue 6, p3682-3697, 16p
Autor:
Lambert, Marine1 Marine.Lambert@crchudequebec.ulaval.ca, Benmoussa, Abderrahim1 Abderrahim.Benmoussa@crchudequebec.ulaval.ca, Provost, Patrick1 patrick.provost@crchudequebec.ulaval.ca
Publikováno v:
Non-Coding RNA. Mar2019, Vol. 5 Issue 1, p1-19. 19p.
Publikováno v:
Contemporary Family Therapy: An International Journal. Sep2015, Vol. 37 Issue 3, p329-339. 11p. 2 Charts.
Autor:
Jurėnas, Dukas, Payelleville, Amaury, Roghanian, Mohammad, Turnbull, Kathryn J, Givaudan, Alain, Brillard, Julien, Hauryliuk, Vasili, Cascales, Eric
Publikováno v:
Nucleic Acids Research; 8/20/2021, Vol. 49 Issue 14, p8384-8395, 12p