Zobrazeno 1 - 10
of 23
pro vyhledávání: '"B. Almashary"'
Autor:
Nabeel Abolkhair, B. Almashary
Publikováno v:
Journal of King Saud University: Engineering Sciences, Vol 20, Iss 2, Pp 77-80 (2008)
Beam propagation method is used to simulate numerically a proposed 1x3 optical power divider. Simulation results show that the proposed structure can divide the optical power with a division ratio equal to one and with branching angles as large as 8
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9cb8fb1922ca654f99c0da3c37ca4267
http://www.sciencedirect.com/science/article/pii/S1018363918308298
http://www.sciencedirect.com/science/article/pii/S1018363918308298
Autor:
B. Almashary
Publikováno v:
Journal of King Saud University: Engineering Sciences, Vol 18, Iss 2, Pp 249-259 (2006)
In this paper, a genetic-based algorithm is proposed and implemented to extract diode circuit model parameters. Saturation current, ideality factor, and series resistance are extracted without a need for initial conditions. The proposed technique is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e666a004f19052ac9b782ec75859fe2e
https://doi.org/10.1016/s1018-3639(18)30838-9
https://doi.org/10.1016/s1018-3639(18)30838-9
Autor:
H Alhokail, B Almashary
Publikováno v:
Microelectronics Journal. 31:239-243
A current-mode triangular wave generator circuit using two positive second-generation current conveyors (CCII+) is proposed and implemented. The circuit consists of an astable multivibrator to generate a square wave followed by an integrator. The ana
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c632850befa41145c009cf6bafdb4c94
https://doi.org/10.1016/s0026-2692(99)00106-8
https://doi.org/10.1016/s0026-2692(99)00106-8
Publikováno v:
Journal of King Saud University: Engineering Sciences, Vol 10, Iss 2, Pp 183-199 (1998)
This work presents an accurate, fast and automated technique for characterizing p-n junction single crystal solar cells. A PC-based system was constructed to measure the static conditions — current-voltage characteristics, and dynamic characteristi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c6c3f22fba4c731ea5bc7ee64debcf9e
https://doi.org/10.1016/s1018-3639(18)30695-0
https://doi.org/10.1016/s1018-3639(18)30695-0
Publikováno v:
2009 International Multimedia, Signal Processing and Communication Technologies.
Field programmable gate arrays (FPGAs) have emerged as platform of choice for efficient hardware realization of computation intensive algorithms because of their intrinsic parallelism and flexible architecture. However, to achieve high performance, F
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0010ddb367d1c2e7e7d0a72cd518d525
https://doi.org/10.1109/mspct.2009.5164238
https://doi.org/10.1109/mspct.2009.5164238
Publikováno v:
2009 International Multimedia, Signal Processing and Communication Technologies.
Algorithms used in signal and image processing applications are computationally intensive. For optimized hardware realization of such algorithms with efficient utilization of available resources, an in-depth knowledge of the targeted field programmab
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b8adfddfd97bf88130ca0adff2af6d6
https://doi.org/10.1109/mspct.2009.5164235
https://doi.org/10.1109/mspct.2009.5164235
Publikováno v:
APCCAS
Matrix multiplication is a computation intensive operation and plays an important role in many scientific and engineering applications. For high performance applications, this operation must be realized in hardware. This paper presents a parallel arc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54dfdb3f71606a048767c10ca2272d6f
https://doi.org/10.1109/apccas.2008.4746382
https://doi.org/10.1109/apccas.2008.4746382
Publikováno v:
2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.
In this paper, behavioural model of a dual cascaded phase locked loop (PLL) based frequency synthesizer is presented and the results are validated through SystemVision simulation using very high speed Integrated circuit hardware description language-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ec72f0a0e99470b50f085085acc1537
https://doi.org/10.1109/mixdes.2007.4286194
https://doi.org/10.1109/mixdes.2007.4286194
Publikováno v:
2005 International Conference on Microelectronics.
Timing jitter is a concern in high frequency timing circuits. Its presence can degrade system performance in many high-speed applications. In this paper, a new method for minimization of timing jitter due to phase locked loops is described. The timin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b6bd4eb17c702576117b35dbda323a5
https://doi.org/10.1109/icm.2005.1590083
https://doi.org/10.1109/icm.2005.1590083
Publikováno v:
Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004..
Timing jitter is a concern in high frequency timing circuits. Its presence can degrade system performance in many high-speed applications. In this paper, a new method for efficiently measuring timing jitter due to phase locked loops is described. Two
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cf68078042862c88b3d6d7dbd33ebba2
https://doi.org/10.1109/icm.2004.1434709
https://doi.org/10.1109/icm.2004.1434709