Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Aytac Atac"'
Autor:
Ye Zhang, Bastian Mohr, Aytac Atac, Lei Liao, Ralf Wunderlich, Stefan Heinen, Jan Henning Mueller
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 64:1133-1142
This paper presents a wideband fractional- $ { N}$ frequency synthesizer design with a low-effort adaptive calibration technique for $\Sigma \Delta $ quantization noise cancellation. After adopting from the classical single-ended loop filter structur
Autor:
Jan Henning Mueller, Markus Scholl, Bastian Mohr, Aytac Atac, Lei Liao, Zhimiao Chen, Ralf Wunderlich, Ye Zhang, Stefan Heinen
Publikováno v:
2017 IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio and Wireless Applications (PAWR).
This work presents a low complexity dual band wireless narrowband transceiver with integrated PAs. The digital-centric transceiver is suitable for IEEE 802.15.4 (ZigBee etc.), 802.15.4g SUN, Bluetooth, especially Bluetooth Low Energy and the upcoming
Publikováno v:
2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).
This paper presents a continuous-time (CT) quadrature bandpass (QBP) ΔΣ ADC which is reconfigurable in terms of quantizer resolution, bandwidth (BW) and IF. It is designed for use in a low power low-IF multi-band transceiver system. In simulations
Autor:
Ye Zhang, Jan Henning Mueller, Aytac Atac, Lei Liao, Stefan Heinen, Bastian Mohr, Ralf Wunderlich
Publikováno v:
2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
This paper presents a wideband low-spur fractional-N synthesizer with an adaptive noise cancellation technique. By adopting the classical loop filter, the ΣΔ quantization noise as well as the spurs are compensated with simple calibration circuits.
Autor:
Ye Zhang, Aytac Atac, Jan Henning Mueller, Zhimiao Chen, Stefan Heinen, Lei Liao, Bastian Mohr
Publikováno v:
SoCC
A low complexity low power transmitter architecture for narrow band applications is presented, consisting of two single polar transmitters for the 900MHz and the 2.4GHz band, respectively. Only a single 1.8GHz local oscillator signal is used employin
Publikováno v:
CSNDSP
This paper presents a low power clock multiplier circuit to be used in multistandard transceivers. The circuit is based on a delay locked loop (DLL) and can be used to multiply the input clock reference by 2, 3, 4 5 or 6. The offered clock multiplier
Autor:
Aytac Atac, Zhimiao Chen, Yifan Wang, Lei Liao, Stefan Heinen, Ralf Wunderlich, Martin Schleyer, Ye Zhang
Publikováno v:
DAC
Multistandard SoC's including advanced RF and analog circuitry with digital blocks are pervasive in modern IC's. However, the system design and verification methodologies that capture the complexity of multistandard RF SoC's are still limited. In thi
Autor:
Zhimiao Chen, Ralf Wunderlich, Martin Schleyer, Ye Zhang, Yifan Wang, Lei Liao, Stefan Heinen, Aytac Atac
Publikováno v:
RWS
This paper presents a fully integrated bluetooth low energy (BTLE) receiver front-end implemented in 0.13 um CMOS including the low noise amplifier (LNA), mixer and a variable bandwidth complex bandpass filter. The measured current consumption of the
Autor:
Jan Henning Mueller, Yifan Wang, Renato Negra, Aytac Atac, Stefan Heinen, Bastian Mohr, Lei Liao, Ralf Wunderlich, Muh-Dey Wei, Martin Schleyer, Ye Zhang
Publikováno v:
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
This paper presents a low power high performance frequency synthesizer. Based on the current-reuse VCO architecture, the whole system power consumption is significantly saved with excellent phase noise performance. Imbalance amplitude problems caused
Publikováno v:
ISCAS
This paper presents a continuous-time quadrature bandpass ΔΣ ADC that achieves 60dB DR and 67.4dB SFDR at 1MHz BW and 1MHz IF. The modulator uses capacitive feedforward architecture for the 3rd order loop filter for reduced power consumption and a