Zobrazeno 1 - 10
of 28
pro vyhledávání: '"Axel Nackaerts"'
Autor:
Surendra Guntur, Phillip Christie, Ghiath Al-Kadi, Anirban Lahiri, Clemens Wüst, Andrei Terechko, A. Kumar, Marc Duranton, Jan Hoogerbrugge, Axel Nackaerts
Publikováno v:
The Lens
Multicore architectures provide scalable performance with a lower hardware design effort than single core processors. Our article presents a design methodology and an embedded multicore architecture, focusing on reducing the software design complexit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::878194fa8c65e0c8ccacc7f1aaae7be4
https://doi.org/10.1145/2180887.2180890
https://doi.org/10.1145/2180887.2180890
Publikováno v:
IEEE Transactions on Speech and Audio Processing. 11:36-44
We report on our research concerning the calibration of physical models for sound synthesis. We combine waveguide physical modeling synthesis with formant filtering, by dividing the nonlinear description of the reed mechanism into a nonlinear part an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b4184a7dfa87cc59b2b049671a6ef483
https://doi.org/10.1109/tsa.2002.807351
https://doi.org/10.1109/tsa.2002.807351
Publikováno v:
IEEE Electron Device Letters. 28:232-234
Conventional charge pumping is demonstrated on triple-gate silicon-on-insulator FinFET gated-diode structures with varying fin widths. A simple technique is proposed and verified allowing to independently estimate fin top and sidewall interface trap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5291f14c3a247bab1e3288d8f3c1c0b5
https://doi.org/10.1109/led.2007.891263
https://doi.org/10.1109/led.2007.891263
Autor:
Axel Nackaerts, Nadine Collaert, Liesbeth Witters, Georgios Vellianitis, T.S. Doorn, Rita Rooyackers, Malgorzata Jurczak, T. Merelle, F.C. Voogt, Blandine Duriez, M.J.H. van Dal, Bartek Pawlak, G. Curatola, Gerben Doornbos, R.J.P. Lander, Ray Duffy, Phillip Christie
Publikováno v:
2008 IEEE International Electron Devices Meeting.
Vt-mismatch, and thus SRAM scalability, is greatly improved in narrow SOI FinFETs, with respect to planar bulk, because of their undoped channel and near-ideal gate control. We show by simulations and by measurements that in FinFETs, unlike planar bu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eb416cf89f1f85dc05351dfc8cef2e43
https://doi.org/10.1109/iedm.2008.4796662
https://doi.org/10.1109/iedm.2008.4796662
Publikováno v:
2008 IEEE International Electron Devices Meeting.
Several innovative modifications to standard design flows are described which enable new device technologies to be rapidly assessed at the system level. Cell libraries from these rapid flows are employed by a design flow description language (PSYCHIC
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf5155de439426daaba41b633301c06b
https://doi.org/10.1109/iedm.2008.4796787
https://doi.org/10.1109/iedm.2008.4796787
Autor:
Wim Dehaene, Mircea Dusa, Geert Vandenberghe, Staf Verhaegen, Stefan Cosemans, P. Marchal, Axel Nackaerts
Publikováno v:
SPIE Proceedings.
To ensure the continuation of the scaling of VLSI circuits fo r years to come, the impact of litho on performance of logic circuits has to be understood. Using different litho options such as single or double patterning may result in different proces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fd3cbe2fcbbf5df0be41963acc5e31f7
https://doi.org/10.1117/12.773333
https://doi.org/10.1117/12.773333
Autor:
T. Schulz, Axel Nackaerts, Florian Bauer, Georg Georgakos, Malgorzata Jurczak, M. Fulde, K.T. San, D. Schmitt-Landsiedel, Christian Pacha, Weize Xiong, K. von Arnim, Klaus Schrüfer, C.R. Cleavelin
Publikováno v:
ESSCIRC
We present an investigation of different layout options for multi-gate-FET (MuGFET) SRAM cell design. Measurement results for four different core cell layouts are shown. Two different gate stacks using single mid-gap metal gates and HfSiON/SiON gate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::33692f628e3a9e000b4674bf3b017f11
https://doi.org/10.1109/esscirc.2007.4430325
https://doi.org/10.1109/esscirc.2007.4430325
Autor:
K.T. San, Weize Xiong, Rita Rooyackers, C.R. Cleavelin, Axel Nackaerts, Andrew Marshall, Malgorzata Jurczak, Bart Degroote, Florian Bauer, Abhisek Dixit, Nadine Collaert, K. Schrufer, R. Singanamalla, K. von Arnim, A.C. Pacha, T. Schulz, Emmanuel Augendre, T. Vandeweyer
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
This paper presents an in-depth analysis of digital performance of a Multi-Gate FET technology. Ring oscillators with metal gates and undopedfins show an inverter delay of 13.9ps at 1V, the highest performance of a Multi-Gate FET technology reported
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::27e3f3c33f99efb8b567d5659af5848e
https://doi.org/10.1109/vlsit.2007.4339745
https://doi.org/10.1109/vlsit.2007.4339745
Autor:
Staf Verhaegen, Axel Nackaerts, Hans Kattouw, Frank van Bilsen, Serge Biesemans, Mircea Dusa, Geert Vandenberghe
Publikováno v:
SPIE Proceedings.
In this paper the impact of overlay and CD uniformity specifications on device and SRAM cell functional and parametric yield are analyzed. The variation of channel strain due to partial etching of the stress layer is determined, and we find that incl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::78bfe7cca88b9ad0af63128d3dc53f29
https://doi.org/10.1117/12.713385
https://doi.org/10.1117/12.713385
FUSI Specific Yield Monitoring Enabling Improved Circuit Performance and Fast Feedback to Production
Autor:
Maarten Rosmeulen, Axel Nackaerts, Rita Verbeeck, Jorge A. Kittl, Thomas Chiarella, Ingrid Debusschere, Malgorzata Jurczak, Aude Rothschild, J. Ramos, Christoph Kerner, Philippe Absil, Liesbeth Witters, Howard L. Tigelaar, M. de Potter, Hao Yu, T. Y. Hoffmann, Anabela Veloso, Anne Lauwers, Serge Biesemans
Publikováno v:
2007 IEEE International Conference on Microelectronic Test Structures.
The integration of fully silicided gates on a high-k dielectric in a standard process flow offers a solid alternative to the conventional Poly/SiON devices. In this work, we provide an extensive analysis of the module yield extracted for such devices
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aa1566c042bf9e939e6bc83396644f0a
https://doi.org/10.1109/icmts.2007.374450
https://doi.org/10.1109/icmts.2007.374450