Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Augusto Berndt"'
Publikováno v:
Integration. 87:293-305
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::93ae61c461f91e1d3ddcb36b5c8bf35d
https://doi.org/10.1016/j.vlsi.2022.08.004
https://doi.org/10.1016/j.vlsi.2022.08.004
Autor:
Naiara Sachetti, Bryan Martins Lima, Augusto Berndt, Cristina Meinhardt, Jonata Tyska Carvalho
Publikováno v:
Anais do XIV Computer on the Beach - COTB'23.
RESUMOAtualmente, o número elevado de entradas em circuitos digitaistem se tornado um problema cada vez mais comum, demandandonovas soluções para a otimização lógica dos mesmos. Uma técnicaque vem sendo utilizada nos últimos anos é a de Logi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6dd7af1ca6b30b828e23e7bf7f15b110
https://doi.org/10.14210/cotb.v14.p456-458
https://doi.org/10.14210/cotb.v14.p456-458
Autor:
Bryan Martins Lima, Naiara Sachetti, Augusto Berndt, Cristina Meinhardt, Jonata Tyska Carvalho
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783031295720
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d40a6c22a6a63a94a4773e946b579795
https://doi.org/10.1007/978-3-031-29573-7_10
https://doi.org/10.1007/978-3-031-29573-7_10
Autor:
Isac S. Campos, Augusto Berndt, Brunno A. de Abreu, Jonata T. Carvalho, Mateus Grellert, Cristina Meinhardt
Publikováno v:
2022 IEEE 15th Dallas Circuit And System Conference (DCAS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d2e9279b96737e2d3f058348fe8191ab
https://doi.org/10.1109/dcas53974.2022.9845636
https://doi.org/10.1109/dcas53974.2022.9845636
Publikováno v:
2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI).
Deep neural networks tend to be extensively power and area consuming for their processing hardware. Integrated circuit designers face a considerable challenge when implementing machine learning hardware since DNNs require so many resources. This work
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d19962c40ce7b42e69fb31027d8a8f92
https://doi.org/10.1109/sbcci53441.2021.9529971
https://doi.org/10.1109/sbcci53441.2021.9529971
Autor:
Brunno Abreu, Augusto Berndt, Jonata Tyska Carvalho, Cristina Meinhardt, Isac de Souza Campos, Bryan Lima, Mateus Grellert
Publikováno v:
2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI).
Logic synthesis tools face tough challenges when providing algorithms for synthesizing circuits with increased inputs and complexity. Traditional approaches for logic synthesis have been in the spotlight so far. However, due to advances in machine le
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::14000bbc3bbe459b2c6b5b1058094a64
https://doi.org/10.1109/sbcci53441.2021.9529968
https://doi.org/10.1109/sbcci53441.2021.9529968
Autor:
Sergio Bampi, Mateus Grellert, Isac de Souza Campos, Brunno Abreu, Augusto Berndt, Cristina Meinhardt, Jonata Tyska Carvalho
Publikováno v:
ISCAS
This work evaluates the use of Decision Trees (DTs) methods for a fast logic minimization of Boolean functions. The proposed DT approach is compared to traditional Espresso logic minimizer and the minimization algorithms available in the ABC tool. Th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::680a73d62a74f4d86385250f288bed70
https://doi.org/10.1109/iscas51556.2021.9401664
https://doi.org/10.1109/iscas51556.2021.9401664
Autor:
Yu-Shan Huang, Guilherme B. Manske, Matheus F. Pontes, Wei Zeng, Isac de Souza Campos, Walter Lau Neto, Satrajit Chatterjee, Zixuan Jiang, Marilton Sanchotene de Aguiar, Mingfei Yu, Brunno Abreu, Alan Mishchenko, Akash Kumar, Yuan Zhou, Xinpei Zhang, Azadeh Davoodi, David Z. Pan, Pierre-Emmanuel Gaillardon, Qingyang Yi, Hoa-Ren Wang, Cristina Meinhardt, Yukio Miyasaka, Aditya Lohana, Augusto Berndt, Zhiru Zhang, Rasit O. Topaloglu, Po-Chun Chien, Jordan Dotzel, Jie-Hong R. Jiang, Jonata Tyska Carvalho, Leomar S. da Rosa, Masahiro Fujita, Valerio Tenace, Jiaqi Gu, Yichi Zhang, Hanyu Wang, Sergio Bampi, Paulo F. Butzen, Shubham Rai, Mateus Grellert, Zheng Zhao
Publikováno v:
DATE
Logic synthesis is a fundamental step in hardware design whose goal is to find structural representations of Boolean functions while minimizing delay and area. If the function is completely-specified, the implementation accurately represents the func
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::34702200b0eecb434607051a22921f5d
https://doi.org/10.23919/date51398.2021.9473972
https://doi.org/10.23919/date51398.2021.9473972
Publikováno v:
SBCCI
This work focuses on optimizing circuits representing neural networks (NNs) in the form of and-inverter graphs (AIGs). The optimization is done by analyzing the training set of the neural network to find constant bit values at the primary inputs. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::adaecf1141382cd42cf9a300f31eadb9
https://doi.org/10.1145/3338852.3339874
https://doi.org/10.1145/3338852.3339874