Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Ashima B. Chakravarti"'
Autor:
R. Takalkar, Anita Madan, Dominic J. Schepis, Eric C. Harley, Bin Yang, Abhishek Dube, Teresa L. Pinto, Zhibin Ren, Thomas N. Adam, Linda Black, Z. Zhu, Johan W. Weijtmans, Rainer Loesing, Jinghong Li, Ashima B. Chakravarti
Publikováno v:
ECS Transactions. 16:325-332
In addition to device scaling, strain engineering using SiC stressors in the S/D regions is important for nFET performance enhancement [1-3]. In this paper, we review the characterization of fully-strained epitaxial SiC and in-situ doped SiC:P films
Autor:
Scott Luning, Ashima B. Chakravarti, Z. Zhu, A. Gehring, Anita Madan, Alexander Reznicek, Guangrui Xia, R. Takalkar, Dan Mocuta, Dominic J. Schepis, B. Yang, Thomas N. Adam, E. Leobandung, Ka Kong Chan, J. Faltermeier, J. P. de Souza, Zhibin Ren, John Li, Rohit Pal, Eric C. Harley, Edward P. Maciejewski, Brian J. Greene, Abhishek Dube, D.-G. Park, M. Cai, D. K. Sadana, Linda Black, Bin Yang, Johan W. Weijtmans, G. Pei
Publikováno v:
ECS Transactions. 16:317-323
Summary In summary, this work demonstrates that integrating ISPD eSi:C stressor in the thick-oxide long-channel nMOS source and drain is feasible. Key challenges lie in both high-quality ISPD eSi:C EPI development and modification of the conventional
Autor:
Russell H. Arndt, Ashima B. Chakravarti, Anthony G. Domenicucci, Amanda L. Tessier, Jinping Liu, Sunfei Fang, Kevin McStay, Zhengwen Li, Randolph F. Knarr, S. Lee, Joseph F. Shepard, Herbert L. Ho, A. Arya, R. Venigalla, W. Davies, R. Takalkar, Rishikesh Krishnan, Paul C. Parries, B. Morgenfeld, Xin Li, S. Gupta, Michael P. Chudzik, Scott R. Stiffler, Puneet Goyal, Babar A. Khan, Sadanand V. Deshpande, J. Dadson, Scott D. Allen
Publikováno v:
2010 IEEE International SOI Conference (SOI).
In this paper, we describe the unique scaling challenges, critical sources of variation, and the potential trench leakage mechanisms of 32nm trench capacitors that utilize high-к/metal electrode materials. This is the first eDRAM technology that has
Autor:
Byeong Y. Kim, Christian Lavoie, Rainer Loesing, Ashima B. Chakravarti, Anita Madan, I. Popova, Jinghong Li, Thomas W. Dyer, Teresa L. Pinto, Zhijiong Luo, Yaocheng Liu, William K. Henson, K.K. Chan, Ahmet S. Ozcan, Nivo Rovedo, Ken Rim, Oleg Gluschenkov
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
Current drive enhancement is demonstrated in sub-40 nm NFETs with strained silicon carbon (Si:C) source and drain using a novel solid-phase epitaxy (SPE) technique for the first time. The very simple process uses no recess etch or epi deposition step
Autor:
Anupama Mallikarjunan, E. Adams, Leo Tai, Ying Li, Ashima B. Chakravarti, Sadanand V. Deshpande, Anthony G. Domenicucci, J. Coffin, S.P. Sun, N. Klymko, J. Widodo, C.W Lai, S. W. Bedell, Anita Madan, Michael P. Belyansky
Publikováno v:
MRS Proceedings. 863
Thin SiN films deposited by plasma enhanced chemical vapor deposition (PECVD) have been analyzed by a variety of analytical techniques including Fourier Transform Infrared Spectroscopy (FTIR), X-ray reflectivity (XRR), and Rutherford Backscattering S
Autor:
Victor Chan, See-Hun Yang, E.J. Nowak, Padraic Shafer, Shih-Fen Huang, Ashima B. Chakravarti, An L. Steegen, Wei Jin, Terence B. Hook, Nivo Rovedo, Phung T. Nguyen, D. Lea, Jia Chen, Rajesh Rengarajan, C. Wann, X. Chen, Christopher V. Baiocco, Hung Ng, Victor Ku
Publikováno v:
Scopus-Elsevier
A leading edge 90 nm logic bulk foundry technology with 45 nm gate length devices, incorporating strain engineering, is described in this paper. Gate length and dielectric scaling, along with optimized strain engineering, enable high performance devi
Autor:
Zhijiong Luo, John Bruley, Phung T. Nguyen, Byoung Hun Lee, Ashima B. Chakravarti, Elizabeth A. Duch, P. Kozlowski, Akihisa Sekiguchi, Rajarao Jammy, Rajesh Rengarajan, C. Wann, Vijay Narayanan, Cyril Cabral, Wenjuan Zhu, Keith Kwong Hon Wong, Hung Y. Ng, N. Edleman, Paul Ronsheim, Ryan M. Mitchell, Oleg Gluschenkov, Dae-Gyu Park, An L. Steegen, Michael P. Chudzik, Victor Ku, Christopher P. D'Emic, Paul C. Jamison, Richard Wise, Hyungjun Kim, Anthony I. Chou
Publikováno v:
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..
Thermally stable dual work function metal gates are demonstrated using a conventional CMOS process flow. The gate structure consists of poly-Si/metal nitrides (MN/sub x/) SiON (or high-k)/Si stack with atomic layer deposition (ALD)-TaN/sub x/ for the
Autor:
Ashima B. Chakravarti, James Ellenberger, Richard A. Conti, Laertis Economikos, Byeongju Park
Publikováno v:
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 19:1788
The bis(tertiary-butylamino)silane-based low-pressure chemical vapor deposition (LPCVD) undoped silicate glass and phospho-silicate glass (PSG) processes were investigated to study film composition, etch rate, and step coverage. Through the addition