Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Artur Kh. Mkhitaryan"'
Publikováno v:
2020 IEEE 40th International Conference on Electronics and Nanotechnology (ELNANO).
In this paper a new method of design of CMOS decoder circuit was proposed. To minimize power consumption and increase the performance of the design the following design solutions have been combined: mixed-logic design method, combining transmission g
Autor:
Vahagn A Aghababyan, Ghazaryan Lilit, Petrosyan Gegham, Artur A. Petrosyan, Artur Kh. Mkhitaryan, Vazgen Melikyan, Ruben H. Musayelyan
Publikováno v:
2019 IEEE 39th International Conference on Electronics and Nanotechnology (ELNANO).
This paper continues the main idea of previous research, where the fictive load was used to improve the overshoots in voltage regulators. The idea of this work is the decreasing of the existing voltage overshoot value in the regulators with 7 times b
Autor:
Vagaen Sh. Melikyan, Bagrat E. Baghramyan, Arman S. Trdatyan, Anush Z. Ramazyan, Artur Kh. Mkhitaryan, Shavarsh Melikyan, Andranik K. Hayrapetyan, Ara E. Mkrtchyan
Publikováno v:
EWDTS
Calibration of receiver and transmitter input/output resistances is very imperative for high-speed link standards such as Peripheral Component Interconnect (PCI), Universal Serial Bus (USB), X Attachment Unit Interface (XAUI) etc. As the interface sp
Autor:
Nune H. Beglaryan, Vardan P. Grigoryants, Zaven M. Avetisyan, Andranik K. Hayrapetyan, Simon H. Gharibyan, Artur Kh. Mkhitaryan, Vazgen Melikyan, Gegham A. Petrosyan
Publikováno v:
EWDTS
Low power, area efficient clocked comparator with high resolution was designed in SAED 32/28nm CMOS process for SAR ADC applications. The analog comparator is based on digital cells, hence doesn't have stability issues, mismatches induced by the diff
Autor:
Shavarsh V. Melikyan, Zaven M. Avetisyan, Artur A. Petrosyan, Andranik K. Hayrapetyan, Artur Kh. Mkhitaryan, Vazgen Melikyan
Publikováno v:
2018 IEEE 38th International Conference on Electronics and Nanotechnology (ELNANO).
This paper proposes a method of voltage overshoot correction during the load switching-off in the integrated circuits (ICs) where the negative feedback voltage regulators are used. Method uses fictive dynamic load to compensate the fast switching-off