Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Armen Durgaryan"'
Publikováno v:
Microelectronics Journal. 55:26-39
This work presents the design and implementation of a power-efficient 2-tap feed-forward voltage mode driver which has impedance tuning and signal conditioning capabilities. The driver has a robust mechanism to match its impedance to the line impedan
Autor:
Armen Durgaryan, Abraham Balabanyan
Publikováno v:
2016 XXV International Scientific Conference Electronics (ET).
The paper presents a fully integrated PVT variation detection and on-die resistance calibration system for high-speed applications. The proposed system separately measures and compensates the MOS device resistance deviation due to process, voltage an
Publikováno v:
ICICDT
A design and simulations methodology that detects and compensates for NMOS and PMOS transistor resistance variation is presented. The proposed methodology provides a robust mechanism to match the transmitter impedance to the line impedance which mini
Autor:
Vazgen Melikyan, Harutyun Stepanyan, Gayane Markosyan, Hovik Musayelyan, Armen Durgaryan, Karen Sloyan, Abraham Balabanyan
Publikováno v:
VLSI-SoC
Methods of CMOS resistance process voltage temperature variation detection and compensation are described. Two different approaches are proposed and comparative analysis is performed. The first solution makes use of an external precise resistor as a
Publikováno v:
EWDTS
The paper presents an investigations of various noise effects on frequency stability of differential ring voltage controlled oscillators. The impact of bias generator parameters and PVT variations on noise immunity is demonstrated and simplified mode
Publikováno v:
Ninth International Conference on Computer Science and Information Technologies Revised Selected Papers.
A method of NMOS and PMOS transistor resistance variation detection and compensation, using reference clock frequency is presented. The proposed method provides opportunity to measure and compensate MOS device resistance deviation, due to technology
Publikováno v:
EWDTS
This paper addresses a new approach for low jitter, low power phase locked loop design. Effects of process-voltage-temperature variation on PLL are studied. A self compensating PLL solution using process-voltage-temperature variation effects compensa
Autor:
Vazgen Melikyan, Armen Durgaryan
Publikováno v:
EWDTS
In this paper a programmable highly linear voltage-to-current conversion technique for low noise, wide tunable frequency range voltage controlled oscillator (VCO) is presented. The effect of VCO gain on phase locked loop (PLL) phase noise and frequen