Zobrazeno 1 - 6 of 6 pro vyhledávání: '"Arley Salvador"'
2
100Gbit/s FEC for OTN protocol: Design architecture and implementation results
Autor: Cleber Akira Nakandakare, Dalton Soares Arantes, Eduardo Mobilon, Julio C. de Oliveira, Arley Salvador, Diego Carvalho
Publikováno v: 2014 International Telecommunications Symposium (ITS).
Error correcting codes are widely used in telecommunication systems in order to increase the robustness of the system. With the exponential growth of the data communication world, the architecture of such systems have had to adapt to allow for improv
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::3b3ac673b1786b3101751817848607b0
https://doi.org/10.1109/its.2014.6947951
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3
Design and FPGA implementation of a 100 Gbit/s optical transport network processor
Autor: Eduardo Mobilon, Luis R. Monte, Stephane Boisclair, Avrum Warshawsky, Rodrigo Bernardo, Arley Salvador
Publikováno v: FPL
This paper presents the design and architecture of an OTN Processor, fully implemented in FPGA devices, that provides transport for Ethernet traffic running at 100 Gbit/s into a long-haul optical network, and regeneration of that OTN signal along the
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::d9df697e10fcd32b1d917d6a40959e1b
https://doi.org/10.1109/fpl.2013.6645601
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4
A comparison of Phase Locked Loop and FIFO Locked Loop
Autor: Fabio Renato Bassan, F. R. Pereira, Cleber Akira Nakandakare, Arley Salvador, Luis Paulo Fernandes de Barros
Publikováno v: MWSCAS
In this paper we present a comparison of two methods to control the reading frequency of a First In First Out (FIFO) memory. The first method is based on the monitoring of its filling level and the other uses the synthesis of the writing frequency to
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::17feaad164145247ee5dc3f00c13ba9f
https://doi.org/10.1109/mwscas.2013.6674897
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5
Architecture and FPGA implementation of a 10.7 Gbit/s OTN Regenerator for optical communication systems
Autor: Carolina G. Neves, Luis Paulo Fernandes de Barros, Rodrigo Bernardo, Luis R. Monte, Ronaldo F. da Silva, Valentino Corso, Arley Salvador, Daniele R. da Silva, Cleber Akira Nakandakare, Eduardo Mobilon
Publikováno v: FPL
As the newest FPGA technologies provide high operating frequencies, in conjunction with serializer/deserializer hardwired modules enabling the operation of high data rate protocols, these devices are being increasingly used in high-speed telecommunic
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::db3ca4752dc153cf80f81c73a1c9382a
https://doi.org/10.1109/fpl.2012.6339193
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6
100 Gbit/s scrambler architectures for OTN protocol: FPGA implementation and result comparison
Autor: Arley Salvador, Valentino Corso
Publikováno v: MWSCAS
This paper describes and compares two scrambler architectures developed and implemented in an advanced field programmable gate array (FPGA), with applications in 100 Gbit/s optical transport network (OTN) systems.
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::2c200cbbc4593ee375d869bd096c23a0
https://doi.org/10.1109/mwscas.2012.6292167
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