Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Arash Daghighi"'
Autor:
Neda Pourdavoud, Arash Daghighi
Publikováno v:
Journal of Intelligent Procedures in Electrical Technology, Vol 2, Iss 8, Pp 47-58 (2012)
Recently, there has been a growing interest in using SOI MOSFET as the device dimension shrinks to nano scale regime. The difference between SOI and Bulk MOSFETs is the presence of a transition in the output conductance frequency response due to the
Externí odkaz:
https://doaj.org/article/d0bfa449cb844c78892c188f5657620e
Publikováno v:
Journal of Intelligent Procedures in Electrical Technology, Vol 2, Iss 6, Pp 17-23 (2011)
Matrix Converter (MC) is a direct energy conversion device with high input power factor. As a device without dc link elements, its output characteristic and reliability can be degraded by ac line side disturbances. This has attracted many researchers
Externí odkaz:
https://doaj.org/article/e779e376c26644e1aedf8479c09d6dd9
Autor:
Arash Daghighi, Azam Askari Khoshuei
Publikováno v:
Journal of Intelligent Procedures in Electrical Technology, Vol 1, Iss 4, Pp 17-24 (2011)
In this paper, a nonlinear model for the body resistance of a 45nm PD SOI MOSFET is developed. This model verified on the base of the small signal three-dimensional simulation results. In this paper by using the three-dimensional simulation of ISE-TC
Externí odkaz:
https://doaj.org/article/10218ab0c894436ebd196c5d213098e1
Autor:
Arash Daghighi, Abdollah KhalilZad
Publikováno v:
Majlesi Journal of Electrical Engineering. 15:109-113
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef8ca84adef45ace315211b272d067ca
https://doi.org/10.52547/mjee.15.4.109
https://doi.org/10.52547/mjee.15.4.109
Autor:
Nooshien Laderian, Arash Daghighi
Publikováno v:
Journal of Electronics Cooling and Thermal Control. :19-30
In this paper, thermal effects and Drain Induced barrier lowering (DIBL) of silicon-on-insulator (SOI) and silicon-on-diamond (SOD) transistors with 22 nm channel lengths using hydrodynamic simulations have been investigated. Thermal conductivity of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3be78522d6b8a2d383e0b6699abf4258
https://doi.org/10.4236/jectc.2018.82002
https://doi.org/10.4236/jectc.2018.82002
Autor:
Hadi Hematian, Arash Daghighi
Publikováno v:
Solid-State Electronics. 129:182-187
In this paper, we report a diamond-shaped body contact (DSBC) for silicon-on-insulator (SOI) LDMOSFET. Several DSBC devices along with conventional body contact (CBC) structures are laid out using 0.35 μm SOI MOSFET foundry process. The DSBC device
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ff24315eee86fc3ef82832f43f556f7
https://doi.org/10.1016/j.sse.2016.11.007
https://doi.org/10.1016/j.sse.2016.11.007
Autor:
Arash Daghighi
Publikováno v:
IEEE Transactions on Electron Devices. 61:2257-2263
In this paper, a novel concept is introduced to improve the radio-frequency (RF) linearity of partially depleted (PD) silicon-on-insulator (SOI) MOSFET circuits. The transition due to the nonzero body resistance ( R \(_{\rm Body}\) ) in output conduc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7b28d2b781c5da3a3c2a7b4e4895024f
https://doi.org/10.1109/ted.2014.2321419
https://doi.org/10.1109/ted.2014.2321419
Autor:
Arash Daghighi
Publikováno v:
Diamond and Related Materials. 40:51-55
In this paper, a novel silicon-on-diamond (SOD) MOSFET structure is proposed. The new structure eliminates the degraded drain induced barrier lowering (DIBL) inherently observed in SOD devices. A second insulating layer over the buried diamond layer
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d8524dae827f6a778cafc2fd5f4e45a1
https://doi.org/10.1016/j.diamond.2013.10.010
https://doi.org/10.1016/j.diamond.2013.10.010
Autor:
Arash Daghighi, Mohamed A. Osman
Publikováno v:
International Journal of Electronics. 98:801-812
The design of diamond-shaped body-contacted (DSBC) devices using standard layers in a 0.35 µm silicon-on-insulator (SOI) complementary metal-oxide-semiconductor process is described in this article. The technology is based on a manufacturable partia
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5ab1bc704c6258886c58ab945383436d
https://doi.org/10.1080/00207217.2011.562453
https://doi.org/10.1080/00207217.2011.562453