Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Aram Shishmanyan"'
Autor:
Vazgen Melikyan, Aram Shishmanyan, Arsen Hekimyan, Tigran Khazhakyan, Arthur Sahakyan, Davit Trdatyan
Publikováno v:
EWDTS
A low power method of clock signal duty cycle adjustment is presented in this paper. The proposed architecture produces a synchronous signal in the output of system with 50±1% duty cycle over PVT, which is needed to avoid data error and setup/hold t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::74c68780cc92805baafd0a9430d2e27f
https://doi.org/10.1109/ewdts.2015.7493157
https://doi.org/10.1109/ewdts.2015.7493157
Autor:
Arthur Sahakyan, Taron Hovhannisyan, Gagik Hovhannisyan, Davit Trdatyan, Aram Shishmanyan, Vazgen Melikyan, Mikayel Piloyan
Publikováno v:
EWDTS
A method of resistance calibration without external precision elements usage presented in paper. In the proposed method, used structures which operation based on technologically accurate elements and signals to have high accuracy resistance after cal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1bcbe17d26ce69aeed49748eeef308d6
https://doi.org/10.1109/ewdts.2014.7027071
https://doi.org/10.1109/ewdts.2014.7027071
Publikováno v:
Ninth International Conference on Computer Science and Information Technologies Revised Selected Papers.
A method of serial links output data and clock signals setup and hold times correction presented in this paper. The proposed architecture produces corrected clock which have enough setup/hold time margins respect data signal over PVT, which is needed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37b894a6c36f5df45dee910e0530a7c3
https://doi.org/10.1109/csitechnol.2013.6710331
https://doi.org/10.1109/csitechnol.2013.6710331