Zobrazeno 1 - 2
of 2
pro vyhledávání: '"Anupa. S. Kavale"'
Publikováno v:
IOSR Journal of Electronics and Communication Engineering. 9:77-81
In this paper a low power bypassing -based multiplier design is present, in which reduction in power is to be achieved in changed partial products of column bypassing multiplier as compared to column bypassing multiplier by exchange NOR gates with AN
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a201d92543112a68424169f5cfbbe8a7
https://doi.org/10.9790/2834-09337781
https://doi.org/10.9790/2834-09337781
Publikováno v:
IOSR journal of VLSI and Signal Processing. 4:53-58
In the recent year growth of the portable electronics is forcing the designers to optimize the existing design for better performance. Multiplication is the most commonly used arithmetic operation in various applications like, DSP processor, math pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::02114654ff5bbbeee87dfca5aeda9f76
https://doi.org/10.9790/4200-04415358
https://doi.org/10.9790/4200-04415358