Zobrazeno 1 - 10
of 45
pro vyhledávání: '"Antonio Canelas"'
Autor:
Antonio Canelas, Fabio Passos, Nuno Lourenco, Ricardo Martins, Elisenda Roca, Rafael Castro-Lopez, Nuno Horta, Francisco V. Fernandez
Publikováno v:
IEEE Access, Vol 9, Pp 124152-124164 (2021)
This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses a multiobjective evolutionary optimization algorithm to design a complete radiofrequency integrated circuit from the passive comp
Externí odkaz:
https://doaj.org/article/4beafb8c9bb1441cbaffd7b66fb3e467
Autor:
Elisenda Roca, Francisco V. Fernández, Rafael Castro-Lopez, Ricardo Martins, Antonio Canelas, Nuno Horta, Nuno Lourenço, Fábio Passos
Publikováno v:
IEEE Access, Vol 9, Pp 124152-124164 (2021)
Digital.CSIC. Repositorio Institucional del CSIC
instname
idUS. Depósito de Investigación de la Universidad de Sevilla
IEEE Access
Digital.CSIC. Repositorio Institucional del CSIC
instname
idUS. Depósito de Investigación de la Universidad de Sevilla
IEEE Access
This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses a multiobjective evolutionary optimization algorithm to design a complete radiofrequency integrated circuit from the passive comp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::653d1d6999febe3918da4fe75c4dc35f
https://ieeexplore.ieee.org/document/9530507/
https://ieeexplore.ieee.org/document/9530507/
Publikováno v:
Integration. 71:38-48
This paper presents a new family of innovative operational transconductance amplifier (OTA) topologies based on CMOS inverter structures, with improved gain and energy-efficiency. This new family of OTA designs is suitable for biomedical and healthca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::28e10760b793acd473ae2d0831bbab06
https://doi.org/10.1016/j.vlsi.2019.12.004
https://doi.org/10.1016/j.vlsi.2019.12.004
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 67:230-234
The topic of this brief is a single-stage amplifier biased by a doublet of voltage-combiners in a folded configuration, in order to be supplied by a power source of 1.2 V, maintaining proper dc biasing and avoiding the need of any device stacking. Th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e0ba554d1af535a3eba78dbb69afb9f8
https://doi.org/10.1109/tcsii.2019.2913083
https://doi.org/10.1109/tcsii.2019.2913083
Autor:
Ricardo Martins, Antonio Canelas, Nuno Horta, Nuno Lourenço, João Carvalho, Ricardo Povoa, Jorge Guilherme
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39:1-13
This paper presents fuzzy ${c}$ -means-based yield estimation (FUZYE), a methodology that reduces the time impact caused by Monte Carlo (MC) simulations in the context of analog integrated circuits (ICs) yield estimation, enabling it for yield optimi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ee1525f6337b7f5d732c102f3ff4bd4
https://doi.org/10.1109/tcad.2018.2883978
https://doi.org/10.1109/tcad.2018.2883978
Publikováno v:
Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies ISBN: 9783030415358
Today’s analog IC sizing and optimization tools are mostly simulation based due to the results accuracy brought by commercial electrical simulators. Additionally, most of the optimization kernels, adopted by those tools, are based on evolutionary o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6bf284d0030c5e8beadc1ae38e4bb9a8
https://doi.org/10.1007/978-3-030-41536-5_4
https://doi.org/10.1007/978-3-030-41536-5_4
Publikováno v:
Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies ISBN: 9783030415358
Analog designers often have to compromise on some circuit performances to achieve a handmade solution, due to the large number of constraints that must be fulfilled. This fact led to the appearance of several techniques and tools for the automation o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b4a68a319d628351c8a93e78eac0d15
https://doi.org/10.1007/978-3-030-41536-5_2
https://doi.org/10.1007/978-3-030-41536-5_2
Publikováno v:
Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies ISBN: 9783030415358
The aggressive shrinking of devices, brought by new CMOS technology nodes, makes that any small process variations induce a larger impact on circuit devices behavior. Transistors having less than one hundred atoms per channel region or any minor vari
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dd0f3d93b55524952f52a7f246924f27
https://doi.org/10.1007/978-3-030-41536-5_3
https://doi.org/10.1007/978-3-030-41536-5_3
Publikováno v:
Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies ISBN: 9783030415358
This chapter presents a short overview of AIDA-C flow. Also, changes related to the implementation of the new MC-based yield estimation methodology, which led to the new AIDA-C Variation-Aware version tool, are detailed. AIDA-C is an analog circuit s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f06d94f85d07d933e5ea7933f87e9f43
https://doi.org/10.1007/978-3-030-41536-5_5
https://doi.org/10.1007/978-3-030-41536-5_5
Publikováno v:
Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies ISBN: 9783030415358
The new analog IC yield estimation methodology was implemented in the state-of-the-art AIDA-C analog IC sizing and optimization tool aiming to offer a new MC-based yield optimization process. The new yield optimization feature of AIDA-C must have a r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ee41215fd93974b7a6a61a08d674bc0
https://doi.org/10.1007/978-3-030-41536-5_6
https://doi.org/10.1007/978-3-030-41536-5_6