Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Ansh Rupani"'
Publikováno v:
IEEE Access, Vol 9, Pp 91564-91574 (2021)
The functional component for an FPGA is the logic element which enables it to adapt to various hardware descriptions. This behavior is mostly due to the MUX-like functional flexibility provided by these logic elements or cells. However, in recent yea
Externí odkaz:
https://doaj.org/article/c1b47077550e41c184901e50d55eb6cd
Autor:
Shubham Rai, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, Akash Kumar
Publikováno v:
VLSI-SoC: Technology Advancement on SoC Design ISBN: 9783031168178
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f91019d21e4a591a7961b26e031a9445
https://doi.org/10.1007/978-3-031-16818-5_9
https://doi.org/10.1007/978-3-031-16818-5_9
Publikováno v:
VLSI-SoC
In this work, we leverage ambipolar transistors in the context of metastability for random number generation. We propose designs of a Minority-based SR latch and a dual-edge triggered True Single Phase Clock D-Flip-Flop (TSPC DFF) to sample two rando
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::669d002fb3156311ed0fbc0d82d32681
https://doi.org/10.1109/vlsi-soc53125.2021.9607015
https://doi.org/10.1109/vlsi-soc53125.2021.9607015
Publikováno v:
DSD
In the present work, we show how new and emerging reconfigurable technologies provide promising improvement over CMOS in the field of hardware security and encryption. We demonstrate how security features are a natural outcome of the circuits based o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5afa7a5077b11392d47f08e2db781b77
https://doi.org/10.1109/dsd.2019.00107
https://doi.org/10.1109/dsd.2019.00107
Publikováno v:
ISVLSI
We present here two watermarking techniques as a countermeasure to IC overbuilding and IP piracy by employing an encoding scheme using polymorphic inverter designs based on reconfigurable nanowire technologies. We employ a fabrication method unique t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ff3c28f78673a9082d2bd6f03b955c83
https://doi.org/10.1109/isvlsi.2019.00123
https://doi.org/10.1109/isvlsi.2019.00123
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. :1-1
Emerging nanotechnologies based reconfigurable field-effect transistors (RFETs) allow switching between p-type and n-type behavior at runtime upon application of different bias potentials. While prior works have mainly focused on security schemes usi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef6ce41909b6d34bd3fc6ccdd0b588b7
https://doi.org/10.1109/tetc.2020.3039375
https://doi.org/10.1109/tetc.2020.3039375
Autor:
Dennis Walter, Walter M. Weber, Shubham Rai, Andre Heinzig, Ansh Rupani, Michael Raitza, Christian Mayr, Tim Baldauf, Jens Trommer, Akash Kumar
Publikováno v:
DATE
Silicon Nanowire (SiNW) based reconfigurable field-effect transistors (RFETs) provide an additional gate terminal called the program gate which gives the freedom of programming p-type or n-type functionality for the same device at runtime. This enabl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::efb502422615fba48606b13de2a05280
https://tud.qucosa.de/id/qucosa:76835
https://tud.qucosa.de/id/qucosa:76835