Zobrazeno 1 - 10
of 118
pro vyhledávání: '"Anne Vandooren"'
Autor:
Gioele Mirabelli, Anne Vandooren, Cesar Roda Neve, Victor Vega Gonzalez, Hans Mertens, Anita Farokhnejad, Pieter Schuddinck, Gayle Murdoch, Shairfe Muhammad Salahuddin, Odysseas Zografos, Lars Ragnarsson, Pieter Weckx, Zsolt Tokei, Geert Hellings, Julien Ryckaert
Publikováno v:
DTCO and Computational Patterning II.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e71062f4e385f63c97b6615098f3e10f
https://doi.org/10.1117/12.2656456
https://doi.org/10.1117/12.2656456
Autor:
Cong Chen, Dieter Van Den Heuvel, Matteo Beggiato, Bensu Tunca Altintas, Alain Moussa, Anne Vandooren, Bart Baudemprez, Michael Schöbitz, Wassim Khaldi, Janusz Bogdanowicz, Christophe Beral, Anne-Laure Charley
Publikováno v:
Metrology, Inspection, and Process Control XXXVII.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7e2e4f369a5fa7f6f93a726b7ea50865
https://doi.org/10.1117/12.2657950
https://doi.org/10.1117/12.2657950
Autor:
Zhicheng Wu, Jacopo Franco, Anne Vandooren, Hiroaki Arimura, Lars-Ake Ragnarsson, Philippe Roussel, Ben Kaczer, Dimitri Linten, Nadine Collaert, Guido Groeseneken
Publikováno v:
IEEE Transactions on Electron Devices. 69:915-921
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::373894dfbd4ac69b6c7f2d5d50ef012d
https://doi.org/10.1109/ted.2022.3141983
https://doi.org/10.1109/ted.2022.3141983
Autor:
E. Dupuy, Geert Mannaert, Ben Kaczer, Jacopo Franco, Vincent De Heyn, Narendra Parihar, Anne Vandooren, Gaspard Hiblot, Sylvain Baudot, Abdelkarim Mercha
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 21:192-198
This work reports on charging damage induced by gate antennae in high- $\kappa $ (HK) Replacement Metal Gate (RMG) technology for the HK-first and HK-last integration flows, comparing plate and comb layouts. For the HK-first devices, a significant de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fdc0947d9b4776bf4c36e60ab5ff38ba
https://doi.org/10.1109/tdmr.2021.3073473
https://doi.org/10.1109/tdmr.2021.3073473
Autor:
Z. Wu, Jacopo Franco, Anne Vandooren, Philippe Roussel, Ben Kaczer, Guido Groeseneken, Nadine Collaert, Dimitri Linten
Publikováno v:
IEEE Transactions on Electron Devices. 68:464-470
Low thermal budget junction-less transistors with back-gate are fabricated as top-tier devices for 3-D sequential integration. The impact of back-gate bias on carrier mobility and bias temperature instability (BTI) reliability is investigated. The ba
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffba834c460479790356e36ed3a8faa6
https://doi.org/10.1109/ted.2020.3041813
https://doi.org/10.1109/ted.2020.3041813
Autor:
Alessio Spessot, Eugenio Dentoni Litta, Anne Vandooren, Marc Schaekers, Hao Yu, Shairfe Muhammad Salahuddin, Julien Ryckaert, Romain Ritzenthaler, Myung-Hee Na, Jean-Luc Everaert, Anshul Gupta
Publikováno v:
IEEE Transactions on Electron Devices. 67:4631-4635
This article explores the feasibility of high-temperature annealing for top-tier devices in a sequential 3-D (Seq3D) technology. Thermally stable bottom-tier device and interconnect design guidelines are provided. CMOS–SRAM partitioning is proposed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7c040cec8f3a865e738816729530c351
https://doi.org/10.1109/ted.2020.3023923
https://doi.org/10.1109/ted.2020.3023923
Autor:
Guido Groeseneken, Ben Kaczer, Anne Vandooren, Dimitri Linten, Jacopo Franco, Philippe Roussel, Tibor Grasser, Gerhard Rzepa, Z. Wu
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 19:262-267
Junction-less FETs are used as top-tier devices in a 3-D sequential integration. Due to the low thermal budget allowed in the 3-D integration, conventional inversion mode FETs show extremely poor BTI reliability. In contrast, a junction-less FET show
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a83d22c92650fd3947d695988a40290f
https://doi.org/10.1109/tdmr.2019.2906843
https://doi.org/10.1109/tdmr.2019.2906843
Autor:
D. Claes, Anne Vandooren, Tibor Grasser, Hiroaki Arimura, Dominic Waldhoer, Laura Nyns, Al-Moatasem El-Sayed, Valery V. Afanas'ev, L.-A. Ragnarsson, Naoto Horiguchi, B. Kaczer, D. Linten, J. Franco, Z. Wu, M. Jech, J.-F. de Marneffe, Andre Stesmans, Y. Kimura
Publikováno v:
2020 IEEE International Electron Devices Meeting (IEDM).
integration requires development of low thermal budget process modules. High-quality SiO 2 interfacial layer (IL), obtained up to now only by high-temperature (≥850°C) oxidation or exposure, is crucial for pMOS NBTI reliability. In unannealed IL
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b8538e787c9531230c8693cb91b564ca
https://doi.org/10.1109/iedm13553.2020.9372054
https://doi.org/10.1109/iedm13553.2020.9372054
Autor:
Eugene Y.-J. Kong, Walter Schwarzenbach, Anne Vandooren, Bich-Yen Nguyen, Olivier Weber, Chen Sun, Aaron Thean, Christophe Maleville, Xiao Gong, Haiwen Xu, V. Barral, R. Berthelon, Franck Arnaud, Jie Liang
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
For the first time, ion implant was used to partially relax the tensile strain by half in the fully-depleted (FD) strained SOI (SSOl) so that SiGe pFETs with a higher compressive strain can be realized at a fixed Ge composition. This enables the co-i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::02e01087f9ea383e2fb876f76228abe7
https://doi.org/10.1109/vlsitechnology18217.2020.9265070
https://doi.org/10.1109/vlsitechnology18217.2020.9265070
Autor:
Philippe Matagne, Gweltaz Gaudin, Katia Devriendt, Narendra Parihar, Anne Vandooren, Toshiyuki Tabata, Haroen Debruyn, Jacopo Franco, Erik Rosseel, Andriy Hikavyy, D. Radisic, Iuliana Radu, Naoto Horiguchi, A. Alvarez, Bertrand Parvais, E. Vecchio, Fulvio Mazzamuto, Bich-Yen Nguyen, G. Besnard, K. Huet, Juergen Boemmels, G. Mannaert, Boon Teik Chan, Lieve Teugels, Nadine Collaert, Jerome Mitard, Niamh Waldron, Steven Demuynck, Walter Schwarzenbach, Z. Wu
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
Top tier devices in a 3D sequential integration are optimized using a low temperature process flow $( . Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50% over the unstra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5b4967a6b0dcc474ef5befbd36b54396
https://doi.org/10.1109/vlsitechnology18217.2020.9265026
https://doi.org/10.1109/vlsitechnology18217.2020.9265026