Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Ankush Srivastava"'
Autor:
Ankush Srivastava, Jais Abraham
Publikováno v:
2022 IEEE International Test Conference (ITC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a90dac9e48889649a227fc71a9bbbd59
https://doi.org/10.1109/itc50671.2022.00052
https://doi.org/10.1109/itc50671.2022.00052
Autor:
Ankush Srivastava, Prokash Ghosh
Publikováno v:
Journal of Electronic Testing. 36:147-167
Protecting user’s secret data on the devices like smartphones, tablets, wearable devices etc, from memory attacks is always a challenge for system designers. The most stringent security requirements and protocols in today’s state-of-the-art syste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b2ad4cc97666ea185fa111529af6541
https://doi.org/10.1007/s10836-020-05867-4
https://doi.org/10.1007/s10836-020-05867-4
Publikováno v:
Journal of Electronic Testing. 33:721-739
Temporal unreliability due to aging, such as Negative-Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) effects etc., in the CMOS circuits may not appear just after the chip production, instead it becomes apparent when it is used un
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a12fd5734b9f4500da04d0b2695865d
https://doi.org/10.1007/s10836-017-5692-7
https://doi.org/10.1007/s10836-017-5692-7
Autor:
Ankush Srivastava, Prokash Ghosh
Publikováno v:
VLSI Design
Protection of secured data content in volatile memories (processor caches, embedded RAMs etc) is essential in networking, wireless, automotive and other embedded secure applications. It is utmost important to protect secret data, like authentication
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cf583d18c9b088c69ddf833bc0b37aad
https://doi.org/10.1109/vlsid.2019.00032
https://doi.org/10.1109/vlsid.2019.00032
Publikováno v:
Journal of Climate Change. 2:57-70
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::305258107b703ff51b05681e56e66ae4
https://doi.org/10.3233/jcc-160017
https://doi.org/10.3233/jcc-160017
Publikováno v:
ITC
Localized small delay defects, for example due to degraded transistor drive strength caused by a broken fin, are a growing concern in current FinFET and emerging gate all around (GAA) technologies. Such defects are currently targeted by timing-aware
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::79e002fb274e7f2b65220812e6d8fd63
https://doi.org/10.1109/test.2017.8242072
https://doi.org/10.1109/test.2017.8242072
Publikováno v:
LATS
Negative bias temperature instability (NBTI) is a key reliability issue in deep sub-micron technology nodes. Identifying NBTI induced high variability timing-critical paths in stipulated design cycle time is a real challenge for System-on-Chip (SoC)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6b80a9d1c3c8da64732162e56cd8bdfa
https://doi.org/10.1109/latw.2017.7906757
https://doi.org/10.1109/latw.2017.7906757
Publikováno v:
ITC
In Today's competitive and rapidly changing electronics market, the speed and effectiveness of product testing have a significant impact on time-to-market. You need to make Design-For-Testability (DFT) an essential part of your design process, along
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f90a2e15e026434bb2b4e000cec70f0
https://doi.org/10.1109/test.2010.5699295
https://doi.org/10.1109/test.2010.5699295