Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Anitha Arumalla"'
Autor:
Madhavi Latha Makkena, Anitha Arumalla
Publikováno v:
Circuits, Systems, and Signal Processing. 41:1166-1186
Ultra-high-definition (UHD) video standards demand processing speed from 60 to 120 fps. These standards require relatively huge resources for providing such high processing speed. In this paper, an area-efficient and high-speed two-dimensional (2D) $
Publikováno v:
Materials Today: Proceedings. 46:3704-3711
With demand for high performance and huge logic dense portable devices, the need for silicon area is increasing. A potential solution for the electronics industry to develop such huge logic demanding applications is the ability to reconfigure the sys
Publikováno v:
Algorithms for Intelligent Systems ISBN: 9789811696497
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c57256588df25a52f5e5225bbba03819
https://doi.org/10.1007/978-981-16-9650-3_22
https://doi.org/10.1007/978-981-16-9650-3_22
Autor:
Madhavi Latha Makkena, Anitha Arumalla
Publikováno v:
Circuits, Systems, and Signal Processing. 41:1187-1187
Autor:
Madhavi Latha Makkena, Anitha Arumalla
Publikováno v:
International Journal of Intelligent Engineering and Systems. 10:40-47
Autor:
Anitha Arumalla, Madhavi Latha Makkena
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9789811073281
The paper presents 2-parallel and 3-parallel scalable recursive short convolution algorithms. The performance of these two short convolution algorithms is verified for different order filters. Hardware complexity is reduced by a factor of 3/4 in 2-pa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fd85c19b7b7ea7e10d641c6f5104c1e0
https://doi.org/10.1007/978-981-10-7329-8_26
https://doi.org/10.1007/978-981-10-7329-8_26
Autor:
Anitha Arumalla, Madhavi Latha Makkena
Publikováno v:
Advances in Intelligent Systems and Computing ISBN: 9789811078675
In this paper, a 2 × 2 block processing architecture for a two-dimensional FIR filter is proposed. A 2-parallel scalable recursive convolution algorithm is used to develop \(p \times q\) block processing algorithm where \(p\) and \(q\) are multiples
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6eea1a8ddcc9e353a25cf5dd47b7101b
https://doi.org/10.1007/978-981-10-7868-2_42
https://doi.org/10.1007/978-981-10-7868-2_42
Publikováno v:
E3S Web of Conferences; 1/16/2024, Vol. 477, p1-9, 9p
Efficient Architecture for Block Parallel Convolution using Two-Dimensional Polyphase Decomposition.
Publikováno v:
Circuits, Systems & Signal Processing; Feb2022, Vol. 41 Issue 2, p1166-1186, 21p