Zobrazeno 1 - 10
of 49
pro vyhledávání: '"Aneesh Nainani"'
Autor:
Jayeeta Biswas, Aneesh Nainani, P. Swarnkar, Saurabh Lodha, Piyush Bhatt, Abhishek Kumar Misra, Christopher Hatem
Publikováno v:
IEEE Transactions on Electron Devices. 62:69-74
In this paper, we present a detailed study of temperature-based ion implantation of phosphorus dopants in Ge for varying dose and anneal conditions through fabricated n+/p junctions and n-type MOSFETs (nMOSFETs). In comparison with room temperature (
Autor:
Ashish Pal, Zhiyuan Ye, Aneesh Nainani, Xinyu Bao, Errol Antonio C. Sanchez, Krishna C. Saraswat
Publikováno v:
IEEE Transactions on Electron Devices. 60:2238-2245
Process conditions of gallium phosphide (GaP) metal-organic chemical vapor deposition growth on silicon (Si) are optimized by material characterization. Thorough investigation of GaP-Si interface at this optimized growth condition is carried out by e
Publikováno v:
ECS Transactions. 45:91-96
Antimony (Sb) based compound semiconductor materials have the highest electron and hole mobilities amongst all compound semiconductor materials. Transistors using Sbchannel deliver much higher performance at significantly lower power. As compared to
Autor:
Krishna C. Saraswat, Yoshio Nishi, Brian R. Bennett, Toshifumi Irisawa, Ze Yuan, J.B. Boos, Aneesh Nainani
Publikováno v:
IEEE Transactions on Electron Devices. 58:3407-3415
While there have been many demonstrations on n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) in III-V semiconductors showing excellent electron mobility and high drive currents, hole mobility in III-V p-channel MOSFETs (pMOSFET
Autor:
Brian R. Bennett, Mario G. Ancona, Toshifumi Irisawa, Krishna C. Saraswat, Aneesh Nainani, J. Brad Boos
Publikováno v:
Solid-State Electronics. 62:138-141
In X Ga 1− X Sb has the highest hole mobility amongst all III–V semiconductors which can be enhanced further with the use of strain. The use of confinement and strain in In X Ga 1− X Sb quantum wells lifts the degeneracy between the light and h
Autor:
Krishna C. Saraswat, Tejas Krishnamohan, Aneesh Nainani, Duygu Kuzum, Piero Pianetta, H.-S. Philip Wong, Yun Sun
Publikováno v:
IEEE Transactions on Electron Devices. 58:59-66
Ge N-MOSFETs have exhibited poor drive currents and low mobility, as reported by several different research groups in the past. The major mechanisms behind poor Ge NMOS performance have not been completely understood yet. In this paper, mechanisms re
Publikováno v:
IEEE Electron Device Letters. 35:717-719
We report high performance Ge p(+)/n junctions using a single, cryogenic (-100 degrees C) boron ion implantation process. High activation >4 x 10(20) cm(-3) results in specific contact resistivity of 1.7 x 10(-8) Omega-cm(2) on p(+)-Ge, which is clos
Autor:
Aneesh Nainani, Dhirendra Vaidya, Arjun Hegde, Swaroop Ganguly, Saurabh Lodha, Theresa Kramer Guarini, Naomi Yoshida
Publikováno v:
2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).
To study the High-k dielectrics on alternate semiconductor materials for transistors a modeling platform has been developed which implements a faster 1D Schrodinger-Poisson along with trap models. A fitting algorithm is used for the extraction of tra
Autor:
Aneesh Nainani, Krishna C. Saraswat, Ze Yuan, Brian R. Bennett, Chien-Yu Chen, J.B. Boos, Archana Kumar
Publikováno v:
IEEE Electron Device Letters. 34:1367-1369
In this letter, we study the formation and electrical properties of Ni-GaSb alloys by direct reaction of Ni with GaSb. It is found that several properties of Ni-antimonide alloys, including low thermal budget processing (300°C), low Schottky barrier
Publikováno v:
IEEE Electron Device Letters. 33:29-31
We propose a novel one-transistor (1T) quantum well (QW) DRAM with raised GaP source/drain. This novel device structure shows much better retention time and sense margin than the existing silicon 1T DRAM (with and without QW). Detailed simulation stu