Zobrazeno 1 - 10
of 180
pro vyhledávání: '"Andriy Hikavyy"'
Autor:
Philipp Hönicke, Yves Kayser, Victor Soltwisch, Andre Wählisch, Nils Wauschkuhn, Jeroen E. Scheerder, Claudia Fleischmann, Janusz Bogdanowicz, Anne-Laure Charley, Anabela Veloso, Roger Loo, Hans Mertens, Andriy Hikavyy, Thomas Siefke, Anna Andrle, Grzegorz Gwalt, Frank Siewert, Richard Ciesielski, Burkhard Beckhoff
Publikováno v:
Metrology, Inspection, and Process Control XXXVII.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ed1ba149d0a31c58d15e24225bc689f9
https://doi.org/10.1117/12.2657963
https://doi.org/10.1117/12.2657963
Autor:
Geoffrey Pourtois, Julien Ryckaert, Andriy Hikavyy, Alessio Spessot, Geert Eneman, Naoto Horiguchi, Philippe Matagne, Hiroaki Arimura, Roger Loo, An De Keersgieter, Paola Favia, Clement Porret, Anabela Veloso
Publikováno v:
IEEE Transactions on Electron Devices. 68:5380-5385
Stress simulations of Si0.5Ge0.5-channel nanowire transistors with typical 5 nm technology-node dimensions are performed to study the effect of layout on the channel stress generated by virtual substrates, by epitaxial mismatch from source/drain epit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::694d7b20ce41464793fc48ea71611d09
https://doi.org/10.1109/ted.2021.3076754
https://doi.org/10.1109/ted.2021.3076754
Autor:
Basoene Briggs, Roger Loo, Mustafa Ayyad, Manuel Mencarelli, Andriy Hikavyy, Clement Porret, Naoto Horiguchi, Robert Langer, Paola Favia
Publikováno v:
ECS Transactions. 104:139-146
This work reports on low temperature epitaxial growth solutions for the processing of advanced CMOS devices beyond the 3 nm technological node. The complex stacking of highly compositionally contrasted strained group IV materials is first demonstrate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0a5001a4b87c213e0d6a74abc450b606
https://doi.org/10.1149/10404.0139ecst
https://doi.org/10.1149/10404.0139ecst
Autor:
Yosuke Kimura, Kurt Wostyn, Naoto Horiguchi, Hiroaki Arimura, Thierry Conard, Dirk Rondas, Lars-Ake Ragnarsson, Andriy Hikavyy
Publikováno v:
Solid State Phenomena. 314:49-53
The steam oxidation of SiGe shows a transition from Si-like to Ge-like oxidation behavior depending on Ge concentration and oxidation temperature. Ge-like oxidation is described by the generation of oxygen vacancies (VO) at the interface between the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e89f989638b1677a358a89940ce9dea
https://doi.org/10.4028/www.scientific.net/ssp.314.49
https://doi.org/10.4028/www.scientific.net/ssp.314.49
Autor:
Roger Loo, Hugo Bender, Eddy Simoen, Philippe Matagne, Andriy Hikavyy, E. Vancoille, Anabela Veloso, Adrian Chasin, Paola Favia, Erik Rosseel
Publikováno v:
ECS Transactions. 97:59-64
Introduction. The Gate-All-Around (GAA) Nanowire (NW) or nanosheet (NS) architecture provides superior short-channel effects control and is widely considered as one of the most promising candidates to replace finFETs in advanced Logic technology node
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bf16242387d8e22702611e6d5e17af9e
https://doi.org/10.1149/09705.0059ecst
https://doi.org/10.1149/09705.0059ecst
Autor:
Clement Porret, Gianluca Rengo, Mustafa Ayyad, Andriy Hikavyy, Erik Rosseel, Robert Langer, Roger Loo
Publikováno v:
Japanese Journal of Applied Physics. 62:SC1043
The peculiarities and physical properties of gallium-doped (Ge:Ga) and gallium and boron co-doped germanium (Ge:Ga:B) epilayers grown at low temperature (320 °C) by chemical vapor deposition, are investigated and benchmarked against their boron-dope
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::279804b222564184f610eac57573ccfb
https://doi.org/10.35848/1347-4065/acb1b9
https://doi.org/10.35848/1347-4065/acb1b9
Autor:
Nabuyo Nakazaki, Erik Rosseel, Roger Loo, Geoffrey Pourtois, Bastien Douhard, Naoto Horiguchi, Johan Meersschaut, Andriy Hikavyy, John Tolle, Clement Porret, Matteo Tirrito
Publikováno v:
ECS Transactions. 93:11-15
Il continuo down-scaling dei transistor ha permesso il raggiungimento di una eccezionale miniaturizzazione. Cio ha reso la resistenza di contatto parte preponderante della resistenza parassita del dispositivo. In questa tesi si riporta la caratterizz
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6cac222fa4101479a132bc9dc334a63f
https://doi.org/10.1149/09301.0011ecst
https://doi.org/10.1149/09301.0011ecst
Autor:
Andriy Hikavyy, Daire J. Cott, Jerome Mitard, Geert Eneman, E. Capogreco, Hiroaki Arimura, Naoto Horiguchi, Roger Loo, Anurag Vohra, Guillaume Boccardi, Liesbeth Witters, Nadine Collaert, Clement Porret, Erik Rosseel
Publikováno v:
2020 IEEE International Electron Devices Meeting (IEDM).
This paper describes our recent research progress on high-mobility Ge-channel n/pFETs. Gate stack, junction and contact are the key challenging components of Ge n/pFETs. Through the improvement of those unit modules, the electrical performance and re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fd23325d4957070b3b216c04f9865c9a
https://doi.org/10.1109/iedm13553.2020.9372007
https://doi.org/10.1109/iedm13553.2020.9372007
Autor:
Philippe Matagne, Gweltaz Gaudin, Katia Devriendt, Narendra Parihar, Anne Vandooren, Toshiyuki Tabata, Haroen Debruyn, Jacopo Franco, Erik Rosseel, Andriy Hikavyy, D. Radisic, Iuliana Radu, Naoto Horiguchi, A. Alvarez, Bertrand Parvais, E. Vecchio, Fulvio Mazzamuto, Bich-Yen Nguyen, G. Besnard, K. Huet, Juergen Boemmels, G. Mannaert, Boon Teik Chan, Lieve Teugels, Nadine Collaert, Jerome Mitard, Niamh Waldron, Steven Demuynck, Walter Schwarzenbach, Z. Wu
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
Top tier devices in a 3D sequential integration are optimized using a low temperature process flow $( . Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50% over the unstra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5b4967a6b0dcc474ef5befbd36b54396
https://doi.org/10.1109/vlsitechnology18217.2020.9265026
https://doi.org/10.1109/vlsitechnology18217.2020.9265026
Autor:
P. Schuddinck, J. Hung, Sylvain Baudot, Yong Kong Siew, D. Batuk, P. Morin, X. Zhou, R. Koret, E. Capogreco, E. Dentoni Litta, S. Subramanian, G. Mannaert, Farid Sebaai, Naoto Horiguchi, Alessio Spessot, Maryamsadat Hosseini, Thomas Chiarella, T. Hopf, D. Radisic, Antony Premkumar Peter, Andriy Hikavyy, G. T. Martinez, Boon Teik Chan, B. Briggs, S. Sarkar, Anabela Veloso, S. Wang, Steven Demuynck, Katia Devriendt, Erik Rosseel, Julien Ryckaert, Juergen Boemmels
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
We report the first monolithic integration of 3D Complementary Field Effect Transistor (CFET) on 300mm wafers using imec's N14 platform. A monolithic CFET process is cost effective compared to a sequential CFET process. The small N/P separation in a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea63300978f76e7c728e74e620105f61
https://doi.org/10.1109/vlsitechnology18217.2020.9265073
https://doi.org/10.1109/vlsitechnology18217.2020.9265073