Zobrazeno 1 - 10
of 45
pro vyhledávání: '"Andrew Waterman"'
Publikováno v:
International Journal of the Commons, Vol 5, Iss 2, Pp 364-387 (2011)
Strengthening ongoing bottom-up capacity building processes for local and sustainable landscape-level governance is a multi-dimensional social endeavor. One of the tasks involved – participatory rural land use planning – requires more understandi
Externí odkaz:
https://doaj.org/article/9d9833ffaf2946c9a13d98bc2f85090c
Autor:
Andrew Waterman, Ben Norman
Publikováno v:
New Global Studies. 16:7-30
Global trade is often understood by trade union officials to be an abstract policy-level issue without a direct role for workers or shop floor influence. As the UK establishes an independent trade policy in the wake of Brexit, this article explores t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::caaeeac4db4b0382400fdf63b9116dfc
https://doi.org/10.1515/ngs-2022-0009
https://doi.org/10.1515/ngs-2022-0009
Autor:
Andrew Waterman, Yunsup Lee
Publikováno v:
VLSI Circuits
Chip designers can no longer rely on Moore's Law and Dennard scaling to make inefficient general-purpose processors faster, cheaper, and lower-power. The industry has instead been forced toward building specialized domain-specific systems on chip (So
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3bc8dd77f8fa5455b57ba9777cba546
https://doi.org/10.1109/vlsicircuits18222.2020.9162812
https://doi.org/10.1109/vlsicircuits18222.2020.9162812
Autor:
Andrew Waterman
Publikováno v:
Waterman, A 2018, ' The limits of embedded liberalism : TUC strategies to influence the Multi-Fibre Arrangement and the GATT Social Clause, 1973–1994 ', Labour History Review, vol. 83, no. 2, pp. 125-146 . https://doi.org/10.3828/lhr.2018.7
This article compares how the strategy of the Trades Union Congress’ (TUC) attempts to influence the Multi-Fibre Arrangement and implement a ‘social clause’ into the General Agreement on Tariffs and Trade (GATT) changed between the Tokyo and th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e358c0cb68490bcf13c1d8b2152d3451
https://doi.org/10.3828/lhr.2018.7
https://doi.org/10.3828/lhr.2018.7
Autor:
Po-Hung Chen, Hanh-Phuc Le, Brian Richards, Pi-Feng Chiu, Milovan Blagojević, Elad Alon, James Dunn, Nicholas Sutardja, Jaehwa Kwak, Ben Keller, Yunsup Lee, Palmer Dabbelt, Rimas Avizienis, Stevo Bailey, Andreia Cathelin, Alberto Puggelli, Andrei Vladimirescu, Brian Zimmer, Philippe Flatresse, Andrew Waterman, Colin Schmidt, Ruzica Jevtic, Martin Cochet, Krste Asanovic, Borivoje Nikolic
Publikováno v:
Integrated Circuits and Systems ISBN: 9783030394950
Improving the energy efficiency of processor systems-on-chip (SoCs) is key to improving their performance and utility. The FD-SOI silicon process enables integrated systems that can deliver dramatic improvements in energy efficiency through system in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57d8006d43be18490af2e59525ebf897
https://doi.org/10.1007/978-3-030-39496-7_11
https://doi.org/10.1007/978-3-030-39496-7_11
Autor:
David Biancolin, Jack Koenig, Krste Asanovic, Sagar Karandikar, Andrew Waterman, Donggyu Kim, Jonathan Bachrach
Publikováno v:
FPGA
Recent work in FPGA-accelerated simulation of ASICs has shown that much of a simulator can be automatically generated from ASIC RTL. Alas, these works rely on simple models of the outer cache hierarchy and DRAM, as mapping ASIC RTL for these componen
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::59686d01dfafab5d26647115ef51afc1
https://doi.org/10.1145/3289602.3293894
https://doi.org/10.1145/3289602.3293894
Autor:
Andrew Waterman, Yunsup Lee, Alberto Puggelli, Philippe Flatresse, Po-Hung Chen, Brian Richards, Krste Asanovic, Ben Keller, Borivoje Nikolic, Steven Bailey, Elad Alon, Rimas Avizienis, Jaehwa Kwak, Ruzica Jevtic, Nicholas Sutardja, Hanh-Phuc Le, Pi-Feng Chiu, Brian Zimmer, Milovan Blagojevic
Publikováno v:
IEEE Journal of Solid-State Circuits, vol 51, iss 4
This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::470d51f062eff1134bbcee301abae8b7
https://doi.org/10.1109/jssc.2016.2519386
https://doi.org/10.1109/jssc.2016.2519386
Autor:
Krste Asanovic, Bora Nikolic, David A. Patterson, Yunsup Lee, Jaehwa Kwak, Andrew Waterman, Elad Alon, Ben Keller, Henry Cook, Ruzica Jevtic, Stevo Bailey, Alberto Puggelli, Brian Richards, Pi-Feng Chiu, Jonathan Bachrach, Brian Zimmer, Milovan Blagojevic, Rimas Avizienis
Publikováno v:
IEEE Micro. 36:8-20
The final phase of CMOS technology scaling provides continued increases in already vast transistor counts, but only minimal improvements in energy efficiency, thus requiring innovation in circuits and architectures. However, even huge teams are strug
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66511acfa01e28eb38c8ca3bae16bd9f
https://doi.org/10.1109/mm.2016.11
https://doi.org/10.1109/mm.2016.11