Zobrazeno 1 - 10
of 72
pro vyhledávání: '"Andrew Stacy"'
Publikováno v:
ASME Letters in Dynamic Systems and Control. 1
Li-ion batteries are the preferred choice of energy storage in many applications. However, the potential for fire and explosion due to mechanical damage remains a safety concern. Currently, there are no criteria for the extent of the mechanical damag
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c3e49e7ce954abcc9944984d0c6cfbd
https://doi.org/10.1115/1.4049527
https://doi.org/10.1115/1.4049527
Publikováno v:
ACC
Li-ion batteries (LIB) are used in many applications because of their high-power/energy density, long life cycle, and low self-discharge rate. Li-ion batteries are susceptible to mechanical damages which may lead to an electrical short, thermal runaw
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6ad98a3205c86e48262d74fd91e27760
https://doi.org/10.23919/acc45564.2020.9147883
https://doi.org/10.23919/acc45564.2020.9147883
Autor:
Andrew, Stacy E.
Publikováno v:
In Clinical Techniques in Small Animal Practice 2003 18(3):186-192
Akademický článek
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Autor:
Ning Zhu, Huseyin Dinc, Scott Gregory Bardsley, Qicheng Yu, Jon Lanford, Gerry Taylor, Christopher Daniel Dillon, Scott Puckett, Paritosh Bhoraskar, Ushma Mehta, Andrew Stacy Morgan, Ryan Bunch, Matt McShea, Peter Derounian, Ahmed Mohamed Abdelatty Ali, Bryce Gray, Ralph Moore
Publikováno v:
VLSI Circuits
We describe a 14-bit 2.5GS/s non-interleaved pipelined ADC that relies on correlation-based background calibrations to correct the inter-stage gain, settling (dynamic), kick-back and memory errors. A new technique is employed to inject a large dither
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::267a44cdedf37b445c775db41d1b4213
https://doi.org/10.1109/vlsic.2016.7573537
https://doi.org/10.1109/vlsic.2016.7573537
Autor:
Jeff Bray, D Lattimore, R. Sneed, Scott Gregory Bardsley, G. Patterson, Andrew Stacy Morgan, R. Stop, M. Hensley, Ahmed Mohamed Abdelatty Ali, Scott Puckett, Christopher Daniel Dillon, Carroll C. Speir, Paritosh Bhoraskar, Huseyin Dinc
Publikováno v:
IEEE Journal of Solid-State Circuits. 45:2602-2612
This paper describes a 16-bit 250 MS/s ADC fabricated on a 0.18 BiCMOS process. The ADC has an integrated input buffer with a new linearization technique that improves its distortion by 5-10 dB and lowers its power consumption by 70% relative to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f98d99d6ca4db223e7958bca3af1022
https://doi.org/10.1109/jssc.2010.2073194
https://doi.org/10.1109/jssc.2010.2073194
Autor:
Scott Gregory Bardsley, Christopher Daniel Dillon, R. Sneed, Lu Wu, J. Kornblum, Andrew Stacy Morgan, Ahmed Mohamed Abdelatty Ali
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:1846-1855
This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in a 0.35mum BiCMOS process. The ADC has a sample-and-hold circuit that is integrated in the first pipeline stage, which removes the need for a d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8bb87fca758f4ee8e34ddcaa69761ce0
https://doi.org/10.1109/jssc.2006.875291
https://doi.org/10.1109/jssc.2006.875291
Akademický článek
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Autor:
Carroll C. Speir, Robert Sneed, Paritosh Bhoraskar, M. Hensley, David Lattimore, Scott Puckett, Christopher Daniel Dillon, Greg Patterson, Scott Gregory Bardsley, Andrew Stacy Morgan, Russell Stop, Jeff Bray, Ahmed Mohamed Abdelatty Ali
Publikováno v:
ISSCC
Wireless communication applications have driven the development of high-resolution A/D converters (ADCs) with high sample rates, good AC performance and IF sampling capability to enable wider cellular coverage, more carriers, and to simplify the syst
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20c386fbc6818ccf416834f62e08746f
https://doi.org/10.1109/isscc.2010.5433923
https://doi.org/10.1109/isscc.2010.5433923
Autor:
R. Sneed, Andrew Stacy Morgan, Lu Wu, J. Kornblum, Scott Gregory Bardsley, Christopher Daniel Dillon, Ahmed Mohamed Abdelatty Ali
Publikováno v:
CICC
This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in a 0.35 mum BiCMOS process. The ADC has an input switched buffer and 11 pipeline stages. The sample-and-hold circuit is integrated in the first
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a43ed1460040d09dda4d33bab249371
https://doi.org/10.1109/cicc.2005.1568687
https://doi.org/10.1109/cicc.2005.1568687