Zobrazeno 1 - 10
of 78
pro vyhledávání: '"Andrew G. Schmidt"'
Publikováno v:
School Planning & Management. Jun2001, Vol. 40 Issue 6, pEds12. 1p. 3 Color Photographs, 1 Diagram.
Autor:
Alan Li, Andrew G. Schmidt, Matthew French, Ved Chirayath, Saquib A. Siddiqui, Sanil Rao, Vivek V. Menon
Publikováno v:
2021 IEEE Aerospace Conference (50100).
Multispectral, Imaging, Detection, and Active Reflectance (MiDAR) is a method capable of imaging through ocean waves without distortion in 3D at sub-cm resolutions to sense living and non-living structures in light-limited and analog planetary scienc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2381c290885419622281ca251c89714
https://doi.org/10.1109/aero50100.2021.9438307
https://doi.org/10.1109/aero50100.2021.9438307
Publikováno v:
Interdisciplinary Neurosurgery, Vol 27, Iss, Pp 101378-(2022)
An 8-year-old boy presented with progressive left-sided weakness due to a large thalamic cavernous malformation (CM) that did not have a developmental venous anomaly. It was resected under evoked potentials monitoring. The operation was uneventful un
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::417cb80da6b1deb7c8feb02119986927
https://doi.org/10.1016/j.inat.2021.101378
https://doi.org/10.1016/j.inat.2021.101378
Publikováno v:
IGARSS
This paper presents updates to the Virtual Constellation Engine (VCE), a simulator and emulator which enables modeling of sensing, computation, and communication of multi-platform remote sensing systems. Users can launch heterogeneous constellations,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c30d626f07f347ee82192f4975cb8b8
https://doi.org/10.1109/igarss39084.2020.9323610
https://doi.org/10.1109/igarss39084.2020.9323610
Autor:
Andrew G. Schmidt, Ian Taras
Publikováno v:
FCCM
In this work an open-source framework is developed that extends Tools for Open Reconfigurable Computing (TORC) for the purposes of modeling, synthesizing and configuring FPGA-overlays to port designs from older devices to modern FPGAs. Our framework
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::92bfbf597a2197458407e8c83439c035
https://doi.org/10.1109/fccm48280.2020.00050
https://doi.org/10.1109/fccm48280.2020.00050
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2012 (2012)
As the number of cores per discrete integrated circuit (IC) device grows, the importance of the network on chip (NoC) increases. However, the body of research in this area has focused on discrete IC devices alone which may or may not serve the high-p
Externí odkaz:
https://doaj.org/article/a0a401da9da0404f90c699e132e82df1
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2012 (2012)
The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). Redsharc uses an abs
Externí odkaz:
https://doaj.org/article/a6b06e328c8440eca4c1c4c3bf42477d
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2012 (2012)
Designing hardware cores for FPGAs can quickly become a complicated task, difficult even for experienced engineers. With the addition of more sophisticated development tools and maturing high-level language-to-gates techniques, designs can be rapidly
Externí odkaz:
https://doaj.org/article/79691ca71cc04e3a8a75a0258294288c
Publikováno v:
ReConFig
High-Level Synthesis (HLS) is a process that translates traditional software languages (C/C++/Java) into either a hardware description language representation or a netlist representation that, ultimately, can be implemented on an FPGA device, for exa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::318464cdab3acba962085441fa672b74
https://doi.org/10.1109/reconfig48160.2019.8994791
https://doi.org/10.1109/reconfig48160.2019.8994791
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2009 (2009)
Modern High-End Computing systems frequently include FPGAs as compute accelerators. These programmable logic devices now support disk controller IP cores which offer the ability to introduce new, innovative functionalities that, previously, were not
Externí odkaz:
https://doaj.org/article/3f3278a96d8f42a7a37eed8f42638d8f