Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Andrew Ferraiuolo"'
Publikováno v:
Proceedings of the 2022 ACM Workshop on Software Supply Chain Offensive Research and Ecosystem Defenses.
Publikováno v:
ASPLOS
Hardware-based mechanisms for software isolation are becoming increasingly popular, but implementing these mechanisms correctly has proved difficult, undermining the root of security. This work introduces an effective way to formally verify important
Publikováno v:
CCS
This paper presents HyperFlow, a processor that enforces secure information flow, including control over timing channels. The design and implementation of HyperFlow offer security assurance because it is implemented using a security-typed hardware de
Autor:
Andrew Ferraiuolo, Mulong Luo, Joe Corbett-Davies, Andrew C. Myers, Jed Liu, G. Edward Suh, Mark Campbell, Alexander Ivanov
Publikováno v:
CPS-SPC@CCS
Modern cyber-physical systems are complex networked computing systems that electronically control physical systems. Autonomous road vehicles are an important and increasingly ubiquitous instance. Unfortunately, their increasing complexity often leads
Publikováno v:
Journal of Electronic Testing. 31:11-26
The modern integrated circuit (IC) manufacturing process has exposed the fabless semiconductor industry to hardware Trojans that threaten circuits bound for critical applications. This paper investigates an on-chip sensor's effectiveness for Trojan d
Publikováno v:
SOSP
Intel SGX promises powerful security: an arbitrary number of user-mode enclaves protected against physical attacks and privileged software adversaries. However, to achieve this, Intel extended the x86 architecture with an isolation mechanism approach
Publikováno v:
DAC
This paper presents a novel secure hardware description language (HDL) that uses an information flow type system to ensure that hardware is secure at design time. The novelty of this HDL lies in its ability to securely share hardware modules and stor
Publikováno v:
ACM Journal on Emerging Technologies in Computing Systems. 9:1-20
Verifying the trustworthiness of Integrated Circuits (ICs) is of utmost importance, as hardware Trojans may destroy ICs bound for critical applications. A novel methodology combining on-chip structure with external current measurements is proposed to
Publikováno v:
DAC
In today's multicore processors, the last-level cache is often shared by multiple concurrently running processes to make efficient use of hardware resources. However, previous studies have shown that a shared cache is vulnerable to timing channel att
Publikováno v:
HPCA
Computer hardware is increasingly shared by distrusting parties in platforms such as commercial clouds and web servers. Though hardware sharing is critical for performance and efficiency, this sharing creates timing-channel vulnerabilities in hardwar