Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Andres Bryant"'
Autor:
Dhruv Singh, A. Gassaria, V. Chauhan, A. da Silva, P. Lindo, Daniel J. Dechene, M. Gribelyuk, I. Ahsan, M. Hasan, Judson R. Holt, Rod Augur, Jaeger Daniel, G. Northrop, G. Gomba, Ghosh Somnath, H. Narisetty, Basanth Jagannathan, Ting-Hsiang Hung, P. Liu, Y. Zhong, T. Gordon, Y. Fan, C. Schiller, A. Blauberg, O. Patterson, B. Morganfeld, Andres Bryant, J. Choo, T. Nigam, B. Senapati, V. Sardesai, N. Baliga, C. An, I. Ramirez, Rishikesh Krishnan, Arkadiusz Malinowski, S. Lucarini, Z. Sun, Sadanand V. Deshpande, R. Bhelkar, Mahender Kumar, Kong Boon Yeap, D. Conklin, Q. Fang, R. Gauthier, Purushothaman Srinivasan, S. Crown, M. Ozbek, Linjun Cao, G. Han, Z. Song, L. Huang, C. Serrau, R. Sweeney, M. Tan, Keith Donegan, Souvick Mitra, A. Zainuddin, P. Agnello, Balasubramanian S. Haran, Haifeng Sheng, B. Greene, A. Hassan, Tabakman Keith, Xin Wang, Sanjay Parihar, L. Cheng, M. Lagus, Jessica Dechene, D. Xu, G. Gifford, M. Zhao, Jeyaraj Antony Johnson, Y. Yan, Rick Carter, Manoj Joshi, W. Kim, Gabriela Dilliway, Jack M. Higman, S. Kalaga, Kai Zhao, Jinping Liu, A. Ogino, M. Lipinski, Amanda L. Tessier, Garo Jacques Derderian, S. Madisetti, N. Shah, Christopher Ordonio, M. Aminpur, Rakesh Ranjan, S. Saudari, Christa Montgomery, Tony Tae-Hyoung Kim, Jeric Sarad, Jae Gon Lee, Bharat Krishnan, Joseph F. Shepard, L. Hu, J. Sporre, Akil K. Sutton, Eswar Ramanathan, Cathryn Christiansen, J.H. Han, J. Lemon, Patrick Justison, Natalia Borjemscaia, Scott C. Johnson, B. Cohen, Kan Zhang, Srikanth Samavedam, G. Xu, T. Xuan, Unoh Kwon, C. Meng, Katsunori Onishi, Y. Shi, C. Huang, R. Coleman, Manfred Eller, Shreesh Narasimha, B. Kannan, J. Yang, Vivek Joshi, W. Ma, Christopher D. Sheraw, A. K. M. Mahalingam, Craig Child, E. Woodard, Tao Chu, Y. Jin, D. K. Sohn, Hasan M. Nayfeh, Mary Claire Silvestre, M. Lingalugari, G. Biery, Tian Shen, Carl J. Radens, E. Kaste, C-H. Lin, K. Han, K. Anil, Ankur Arya, Mehta Jaladhi, Jia Zeng, S.L. Liew, Michael V. Aquilino, M. Yu, M. Chen, Rohit Pal, E. Maciejewski, Stephan Grunow, Robert Fox, Rinus T. P. Lee
Publikováno v:
2017 IEEE International Electron Devices Meeting (IEDM).
We present a fully integrated 7nm CMOS platform featuring a 3rd generation finFET architecture, SAQP for fin formation, and SADP for BEOL metallization. This technology reflects an improvement of 2.8X routed logic density and >40% performance over th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5545f519d7dcbb19a8a64d95e77053fd
https://doi.org/10.1109/iedm.2017.8268476
https://doi.org/10.1109/iedm.2017.8268476
Opportunities and Challenges of FinFET as a Device Structure Candidate for 14nm Node CMOS Technology
Autor:
Vamsi Paruchuri, Andres Bryant, Bruce B. Doris, Tenko Yamashita, Hiroshi Sunamura, Effendi Leobandung, Hemanth Jagannathan, Junli Wang, Atsuro Inada, Theodorus E. Standaert, Pranita Kulkarni, Robert J. Miller, Johnathan E. Faltermeier, Kingsuk Maitra, Huiming Bu, Veeraraghavan S. Basker, James A. O’Neill, Sivananda K. Kanakasabapathy, Chung-Hsun Lin, T. Yamamoto, Chun-Chen Yeh, Jin Cho, Mukesh Khare
Publikováno v:
ECS Transactions. 34:81-86
FinFET is a promising device candidate for 14nm node CMOS technology. We have developed FinFET device showing superior short channel control at 25nm gate length. This FinFET device featuring gate first high-k/metal gate and merged Epi source/drain pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e339ce32c67c3b83707e7e70c7cdb6b
https://doi.org/10.1149/1.3567563
https://doi.org/10.1149/1.3567563
Autor:
Hasan M. Nayfeh, Nivo Rovedo, Andres Bryant, Shreesh Narasimha, Arvind Kumar, Xiaojun Yu, Ning Su, Jeffrey W. Sleight, Robert R. Robison, Werner Rausch, Hari Mallela, Greg Freeman
Publikováno v:
IEEE Transactions on Electron Devices. 56:3097-3105
Lateral asymmetric channel doping is applied to 45-nm technology NFET devices. The measured effective drain-current enhancement over coprocessed symmetric control devices is 10%. Analysis reveals that the dominant physical mechanism, which accounts f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c49ec993180f9ece4c9b1ebba044ce3e
https://doi.org/10.1109/ted.2009.2032750
https://doi.org/10.1109/ted.2009.2032750
Autor:
Theodorus E. Standaert, Veeraraghavan S. Basker, Sivananda K. Kanakasabapathy, M.V. Khare, Jeffrey B. Johnson, C.-C. Yeh, J. Iacoponi, Balasubramanian S. Haran, Vimal Kamineni, Neeraj Tripathi, H. Bu, Tenko Yamashita, Andres Bryant, Abhijeet Paul, T. Hook, Johnathan E. Faltermeier, Jin Cho, Gen Tsutsui
Publikováno v:
2013 IEEE International Electron Devices Meeting.
A first time rigorous experimental study of effective current (Ieff) variability in high-volume manufacturable (HVM) 14nm Silicon-On-Insulator (SOI) FINFETs is reported which identifies, threshold voltage (Vtlin), external resistance (Rext), and chan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32e6047a13b712382d3a6925c0068ab4
https://doi.org/10.1109/iedm.2013.6724625
https://doi.org/10.1109/iedm.2013.6724625
Publikováno v:
IEEE Electron Device Letters. 27:505-507
Short-channel (L=25nm) silicon-on-insulator (SOI) device performances over a range of gate work function from band edge to midgap and a range of gate-dielectric permittivity from 3.9 to 15 are studied using a two-dimensional simulator that takes into
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6240e55ec4a5e3dceae8ebb18c26029
https://doi.org/10.1109/led.2006.875757
https://doi.org/10.1109/led.2006.875757
Autor:
Theodorus E. Standaert, Johnathan E. Faltermeier, Andres Bryant, Tenko Yamashita, Abhijeet Paul, Neeraj Tripathi, Veeraraghavan S. Basker, Huiming Bu, Jeffrey B. Johnson, Chun-Chen Yeh, Jin Cho, Mukesh Khare, Gen Tsutsui
Publikováno v:
2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
This work presents SOI finFETs with fin width (Dfin) scaled to sub 15nm. The process flow provides robust Dfin scaling as depicted by the universal electrostatic scaling of the DIBL and sub-threshold swing (SS). The high field long channel mobility d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1a613e4c8a2b62b6f64f70348c30e32a
https://doi.org/10.1109/s3s.2013.6716521
https://doi.org/10.1109/s3s.2013.6716521
Autor:
Wilfried Haensch, Andres Bryant, Phil Oldiges, Josephine B. Chang, Michael A. Guillorn, Chung-Hsun Lin
Publikováno v:
2010 IEEE International SOI Conference (SOI).
We have evaluated FinFET and Trigate performance under 15nm node ground rules. Trigate needs to maintain a high aspect ratio in order to achieve a comparable electrostatic performance of FinFET at tight FP, which makes it a fin-geometry instead of ch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::74e38052fa5fa6bcd83be2e7b4135c6b
https://doi.org/10.1109/soi.2010.5641060
https://doi.org/10.1109/soi.2010.5641060
Publikováno v:
Simulation of Semiconductor Processes and Devices 2007 ISBN: 9783211728604
In this work, we investigate multiple FIN FinFET source/drain designs to reduce series resistance and source/drain-to-gate capacitance. The tradeoffs between the increased parasitic capacitance and reduced parasitic resistance are explored using 3D d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2701716ed2926ab7c0b460c70a70eb8f
https://doi.org/10.1007/978-3-211-72861-1_30
https://doi.org/10.1007/978-3-211-72861-1_30
Publikováno v:
ISLPED
Recent progress in the development of subthreshold circuit design techniques has created the opportunity for dramatic energy reductions in many applications. However, energy efficiency comes at the price of timing and energy variability due to proces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b79e9ec1675a4a6ddda186cb1e853be6
https://doi.org/10.1145/1165573.1165660
https://doi.org/10.1145/1165573.1165660
Autor:
Jinghong Li, Henry K. Utomo, Chun-Yung Sung, Andres Bryant, Qiqing Ouyang, Min Yang, Horatio S. Wildman, N. Klymko, David M. Fried, Massimo V. Fischetti, Gregory Costrini, Siddhartha Panda, Thomas S. Kanarsky, John A. Ott, Judson R. Holt, Huajie Chen, Meikei Ieong, Nivo Rovedo
Publikováno v:
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..
CMOS devices with embedded SiGe source/drain for pFETs and tensile stressed liner for nFETs have been demonstrated for the first time on hybrid orientation substrates. Ring oscillators have also been fabricated. Significant performance improvement is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e438830ceea6944fece9508a6d0b16a
https://doi.org/10.1109/.2005.1469199
https://doi.org/10.1109/.2005.1469199