Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Andrei Shibkov"'
Publikováno v:
2022 44th Annual EOS/ESD Symposium (EOS/ESD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0383b1bc0b92652ecd11ae566290730
https://doi.org/10.23919/eos/esd54763.2022.9928458
https://doi.org/10.23919/eos/esd54763.2022.9928458
Publikováno v:
2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
A strong miscorrelation between TLP maximum current to failure and corresponding estimated onwafer-HMM pulse passing level of dual-direction SCR ESD device was studied. For multiple SCR ESD devices in 5-80V voltage range the effect was represented by
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a6940980d0ddbcef13dd1e4d25d0bd04
https://doi.org/10.23919/eos/esd.2018.8509766
https://doi.org/10.23919/eos/esd.2018.8509766
Publikováno v:
2017 39th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
A scenario of unexpected failures of low voltage analog domains at system level stress has been studied both experimentally using test structures and through mixed-mode numerical simulation. The analysis of the failure mechanism and validated design
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ff4dce8e04d3b987897084a4244f539
https://doi.org/10.23919/eosesd.2017.8073457
https://doi.org/10.23919/eosesd.2017.8073457
Publikováno v:
2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
An advanced solution for local protection of the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f600f41c29dee3a42e06384ee3574eca
https://doi.org/10.1109/eosesd.2016.7592530
https://doi.org/10.1109/eosesd.2016.7592530
Publikováno v:
2016 38th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
A study of PMOS arrays self-protection capability, related HBM-TLP miscorrelation and HBM passing level windowing effect is presented. Based on experimental results and 2D mixed-mode numerical simulation analysis the physical mechanism of the PMOS se
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0bb5039d55aca73fa4c3f20681144f8c
https://doi.org/10.1109/eosesd.2016.7592558
https://doi.org/10.1109/eosesd.2016.7592558
Publikováno v:
2015 37th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
A method to exploit the internal gain of the parasitic bipolar transistor in integrated LDMOS devices achieving a mixed bipolar-CMOS regime is proposed and validated using numerical simulation and experimental results. An improvement of active protec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b5746efe08e8367664353ad1bd9721c
https://doi.org/10.1109/eosesd.2015.7314798
https://doi.org/10.1109/eosesd.2015.7314798
Publikováno v:
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs.
This study presents for the first time ESD protection solutions in integrated silicon process technologies for the voltage range up to 600V. The ESD protection clamp is implemented using a NLDMOS-SCR type ESD device architecture. The study presents b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::899875259ab9d548ec5d71e3c6029e2d
https://doi.org/10.1109/ispsd.2011.5890807
https://doi.org/10.1109/ispsd.2011.5890807
Autor:
Vladislav Vashchenko, Andrei Shibkov
Publikováno v:
ESD Design for Analog Circuits ISBN: 9781441965646
This final chapter presents material on a rather cross-disciplinary subject related to system-level ESD robustness. System-level ESD requirements are defined by different standards and specifications than component-level ESD requirements. Component-l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5a06e8484dd72d2e879ad91a2f893b1a
https://doi.org/10.1007/978-1-4419-6565-3_8
https://doi.org/10.1007/978-1-4419-6565-3_8
Autor:
Vladislav Vashchenko, Andrei Shibkov
Publikováno v:
ESD Design for Analog Circuits ISBN: 9781441965646
The purpose of this and the following chapters is to demonstrate the implementation of different ESD protection approaches specific to analog products. Two major categories of analog products are used as examples demonstrating ESD protection challeng
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::34854e714148aa745a0b9b511f092782
https://doi.org/10.1007/978-1-4419-6565-3_6
https://doi.org/10.1007/978-1-4419-6565-3_6